I’ll likely do a bunch of reworking of my breadboard setup soon.

While I’m at it, wondered if there would be any downside with replacing the wd65c02 with wd65c816?

Obviously a few pin changes but can I otherwise just pretend it’s still a 6502 until I want to experiment with some of the new features? Or will I have to rewrite/reorg a bunch of other code and h/w?

Pretty sure the point of the 65816 was to be as close to compatible to the 6502 as you can get while still offering an upgrade path.

I suspect Apple had a large part to play in that decision when they were designing the Apple IIgs.

Yes, it should be quite straightforward.

You can design a circuit to take either the 02 or the 816 with no changes although you end up connecting a clock output on the 02 to +5v via a 3.3K resistor. A jumper link might be better but "it worked for me".

https://projects.drogon.net/ruby-6502-b ... uby-65816/

and I could swap between 02 and 816 when testing it out.

But for a 64KB system where you're not using the extra RAM facilities then it's do-able. You can then use the block-move instructions and i6-bit registers if you can code for it.

One thing to note though - the data bus will be driven by the 816 during the clock low period. This may have a side-effect on some peripherals - it didn't affect my systems as I only have one peripheral - a 65c22 which seems to do the right thing with regard to clock and r/w. My '816 system does not have the databus buffer IC that the reference designs have. YMMV.

-Gordon

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Gordon Henderson.
See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/

Wasn't there a 6502 pin compatible version of the 65816 at one time?

Whatever happened to that, or am I remembering a bad dream?

I guess they are pretty much pin compatible as it is though.

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Bill

The 65802. I bought one back in the late 1980s from Jameco, and it worked nearly perfectly in my Apple ][+. The only reason I say "nearly" is that it wouldn't run games with undocumented opcodes, and the ROM was completely unaware of native mode, so you had to take care. I think it was just a 65816 core that didn't output the bank address, but that may not be 100% of the story.

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Got a kilobyte lying fallow in your 65xx's memory map? Sprinkle some VTL02C on it and see how it grows on you!

Mike B. (about me) (learning how to github)

According to the Wikipedia machine, they were produced on the same fab lines, and the only difference came at the metallization stage where the chip is connected to the package pin. That suggests that the original design may have included an edge connection to the non-multiplexed data bus as well as to the multiplexed one, for use when making W65C802 parts.

*wistfully pining for the day when WDC releases a 65816 in a PLCC-52 package w/o the multiplexing*