Hello everyone. A (quick) search came up with nothing, so newbie question here:
In my efforts to increase the speed of my bootloading processes (from here
viewtopic.php?f=4&t=7939), I'm thinking of doing unconventional things to the '816.
What if I hold BE low during all read cycles? Will whatever is on the databus still reach the internals of the 65816?
Here is a step by step:
Code:
*** Setup ***
Ground PHI2, BE, and /RES // initial conditions
Toggle PHI2 high then low, about 20 times, doesn't matter // just making sure everything is cleared out
Drive external databus // coming from outside source
Put $EA on databus (reset vector will end up being $EAEA, doesn't matter) // this will eventually be NOP instructions
Release /RES to pull high // bring out of reset
Toggle PHI2 high then low, about 20 times // I think that you cannot know exactly how many cycles it will take until /VP goes low?
Check VDA and VPA, if both low then toggle PHI2 high then low one time // if in the middle of a NOP instruction, cycle once more
*** Bootload Read *** // the idea here is to use LDA# and STAal instructions to reach specific RAM addresses
Put $A9 on databus (LDA# instruction)
Toggle PHI2 high then low
Put desired data value on databus
Toggle PHI2 high then low
Put $8F on databus (STAal instruction)
Toggle PHI2 high then low
Put desired low addr on databus
Toggle PHI2 high then low
Put desired high addr on databus
Toggle PHI2 high then low
Put desired bank addr on databus
Toggle PHI2 high then low
*** Bootload Write *** // at this point R/W would be low
Tristate external databus
Release BE to pull high
Toggle PHI2 high then low // this is where the '816 writes to RAM
Ground BE
Drive external databus
Loop back to "Bootload Read"
I read the datasheet and they mention Data/Address Buffers, but it's unclear if inhibits incoming signals and not just outgoing signals. Hypothesizing, I'd say the A0-A15 and R/W lines would be cut off entirely, because they are output-only signals. But what about that bi-directional D0-D7 bus?
Thank you for any insight!
Chad
EDIT:
Looking at the Rockwell datasheet (here
https://web.archive.org/web/20221112220 ... essors.pdf) there is the timing diagram for BE on page 1-15 (see attached picture), which has A0-A15 and R/W going into tri-state, but the databus is oddly absent. Hm.