Hi there,

I am struggling with the problem to re-create an Apple-II-style keyboard controller. The reason behind this is that I would like to have an option for my Ultimate PET to run in an Apple II mode (as I can already use some Apple II expansion cards).

Scanning the keyboard is not a problem, I am using a '595 and '166 shift registers for a makeshift SPI bus to send row selectors and read scan input. That is why this is also titled "more intelligent SPI": if you can connect an ATTiny with SPI bus to a 6502 bus, it could do some data transformation or other handshaking easily...

So, I have a normal 6502 (buffered) bus at 1MHz, and need to provide two memory locations/ranges:
a) read the ASCII value from a keyboard (buffer) out of a controller, with bit 7 as strobe if that is a new character
b) read/write to this location clears the strobe, and reading bit 7 also provides a "active" bit as I understand, i.e. if any key is pressed at all
(maybe someone with more Apple II understanding can confirm this)

I was looking at an ATTiny for this and was almost starting to solder when I noticed that the AVR microcontroller do not have latches on their inputs - and an 8 MHz ATTiny is not fast enough to react on a 1MHz bus in time to serve the right data, even from interrupt. Alone the interrupt latency is 6-8 cycles if I get it right.

I have come up with two options to get data in and out of the ATTiny, but both options have too many ICs for my liking... One is that the ATTiny outputs all 8 bits needed directly (ASCII output and active), and some extra logic to read that from the 6502 side. The downside is, you cannot send data to the ATTiny with that, only read.

The other option is to use another set of shift registers to read/write data, have the ATTiny be interrupted, and use strobes to synchronize the two. But again, lots of ICs there just to connect the ATTiny. This way you could potentially write to the ATTiny to set keyboard layout options.

I have attached schematics for the keyboard scanner section. You'll notice there only half of a '00 used, so the other half is "free" to use on the 6502<->ATTiny connection.
Also I have attached the draft schematics for the two attach options. Sure they are due to some more optimization, but I would like to see if there are other approaches.

What could be another approach would be:
- some CPLD with potentially a ROM for the keyboard layout matrix. Quite crude. Not sure how large this should be. Would be single purpose only, but maybe least number of chips. CPLDs with 5V are getting more and more difficult to find though
- a faster microcontroller - potentially an rp2040.... Those have been shown to be fast enough to track a 1MHz bus. But in my opinion that somehow defeats the purpose...... I could potentially emulate the whole machine in the keyboard controller .. nah...
- Would a (slow) microcontroller with more I/O pins work better? I wouldn't necessarily think so, at least not reducing chip count much. You could go with option one, and add a latch for data sent to the Microcontroller. Potentially an AVR32EA28 would work, which is a new one (unfortunately I have already ordered the tinys and getting others would impose another 20$ shipping bill from mouser... as I wouldn't reach the 50$ free shipping amount...)

Maybe I can tickle your brains with that....? What do you think?

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Author of the GeckOS multitasking operating system, the usb65 stack, designer of the Micro-PET and many more 6502 content: http://6502.org/users/andre/

Lack of latched inputs on small microcontrollers is something that's annoyed me for years - I think the RP2040 either has them or can emulate them, but it's a rare thing. I have a similar issue trying to bus share a 6502 and an ARM; it's not fast enough to do it polled and the interrupts are seriously slow. On the AVR I think the fastest interrupt is from sleep at two or three cycles.

What I've come up with in the past is basically to latch on the write from the data bus and latch the data waiting to go back, with a bit set if there is any. The 6502 has to poll, though I suspect it could be triggered on an IRQ or NMI. It's embarrassing that we can't now do what was simple forty years ago...

Neil

p.s. It's just been pointed out to me that Reichelt is a more economical option than Mouser or Digikey in Germany, with no twenty euro postage (and prices including MwST) though I haven't yet tried them. I will be doing so soon.

Re: reichelt: I know, it's an option, but they don't have all the parts.

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Author of the GeckOS multitasking operating system, the usb65 stack, designer of the Micro-PET and many more 6502 content: http://6502.org/users/andre/

Looking at the Apple II schematics, it seems the description I read was wrong. On the second address no "active" flag is readable. So the schematics can be simplified....

Edit: that's for the original Apple II. But the IIe already have this active flag...

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Author of the GeckOS multitasking operating system, the usb65 stack, designer of the Micro-PET and many more 6502 content: http://6502.org/users/andre/

I have worked on that further, this is what I came up with. It enables a 7bit read/write connection between the 6502 and an ATTiny. 7bit because it is Apple-keyboard compatible, with a data available signal on the highest bit on read (and no further I/O available for the highest bit on write due to the "activity" bit for IIe and onward)... But for other purposes this could be changed.

In total I need 5 ICs to do the integration. Quite a bit. This may be a good point for a CPLD, but it's a start.

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Author of the GeckOS multitasking operating system, the usb65 stack, designer of the Micro-PET and many more 6502 content: http://6502.org/users/andre/

Each write disables the STROBE, and the ATTiny must acknowledge the write, then set the strobe by signaling a byte available. This could be a status response or a dummy, and is just to signal that the ATTiny has got the data.

Looking at it again, I am not sure if I have a potential race condition when the write is acknowledge, the output data can not already be there yet to be read. The ATTiny must switch direction on the I/O port, until that is done, and the byte available was already set before the write(!), the strobe might be there before the data... meh. Need to look at this further...

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Author of the GeckOS multitasking operating system, the usb65 stack, designer of the Micro-PET and many more 6502 content: http://6502.org/users/andre/

ok, after verifying that the '11 is still available ok, I can do this...

Still 5 ICs, race conditions can be avoided as far as I can see. Only the active bit would still need some additional logic...

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Author of the GeckOS multitasking operating system, the usb65 stack, designer of the Micro-PET and many more 6502 content: http://6502.org/users/andre/

Rule of thumb guesswork tells me that the integration logic should fit into a XC9536XL with 44pin package... what do you think?

Would this be worth something like a "standard" 6502.org "adapter" for other AVR and other microcontrollers (maybe generalized, and of course adapted to 8bit)?

(Edit: I was thinking similar to SPI65 or SIB65)?

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Author of the GeckOS multitasking operating system, the usb65 stack, designer of the Micro-PET and many more 6502 content: http://6502.org/users/andre/

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

One could save two chips (the '74 and the 3xAND) if the strobe logic is done in software.

For this the 6502 must know to wait a defined time so it knows that strobe is valid again after a read or write operation.

Additional benefit: the SETSTB would become re-used as 8th data bit, so for non-apple-ii-keyboards it would enable full 8-bit data transfer....

Somehow I don't like the implicit wait period, but it makes the schematics quite easier. Only address decoding and two byte-wide buffers...

What do you think?

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Author of the GeckOS multitasking operating system, the usb65 stack, designer of the Micro-PET and many more 6502 content: http://6502.org/users/andre/

Any comment?

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Author of the GeckOS multitasking operating system, the usb65 stack, designer of the Micro-PET and many more 6502 content: http://6502.org/users/andre/

Are you concerned about compatibility issues with legacy Apple II software? If not, I say "full steam ahead" with your plan (which I must confess I don't completely understand, due to my own shortcomings).

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Got a kilobyte lying fallow in your 65xx's memory map? Sprinkle some VTL02C on it and see how it grows on you!

Mike B. (about me) (learning how to github)

You see, with my ultracpu board I have the possibility to do any memory map I want. And while I currently focus on a Commodore PET clone, using my ultrabus backplane I can already use Apple II I/O cards on said PET clone. So, I thought, why not try to do an Apple II memory map.... The main thing I am still missing, besides the video output that I can program in VHDL, is an Apple II compatible keyboard controller. Therefore this plan, so I can use my PET clone with the PET keyboard, and run Apple II software. I have no idea yet if I can make the timing good enough for the floppies, but at least I'll try.

As a side effect I noted that this Attiny could be an SPI controller for basically any 6502. (I use a pseudo SPI to shift registers that are used to scan the keyboard matrix).

I'll probably do a board and use jumperable options so I can play around and see what works and what not.

Edit: link to my video about it https://youtu.be/KxuPgibIdj4

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Author of the GeckOS multitasking operating system, the usb65 stack, designer of the Micro-PET and many more 6502 content: http://6502.org/users/andre/