Sadly, though, Digikey list no AND parts in any logic family with more than four inputs, which limits the possibilities for building this from discrete logic. The fastest listed x283 (unless I missed one?) looks to be the 54/74F283 at just under 6ns to valid carry out, but obviously with the concomitant voltage limits and power consumption.

(still ten times the speed of my discrete 8080-style alu at 3.3v, though... though that includes routing, function select, and most significantly a ripple carry chain in the design, and would probably speed up at 5v).

Neil

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

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Are you sure about that?

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Not really 6502, but maybe relevant to this thread.

Abuse of 74AUC2G53 Inhibit pin allows for one less gate.
If it doesn't make sense, just ask. Not my clearest drawing.

Series prefixed Manchester Carry, Borrow, or Magnitude.
Karnaugh 0110 XOR for addition, 1001 NXOR for subtraction.
Propagation rules can be inferred from the Karnaugh map.
No wasted time or control line to XORvert the B input.

Generate and Annihilate are not wired as constants here.
Determined by replacement rules LessThan and GreaterThan.
Allowing < = > magnitude comparisons, A-B, B-A, and A+A.

A+A RLTC isn't using addition, but leftward replacement.
Rotate Right TC relies on an external reversing loopback.
RP loops back to reverse order 76543210 ~ 01234567.
No attempt made to flip a reversed result back to normal.
Just keep Rotating Left Through Carry (your other right).

These rules neck down to a single capacitive load when inhibited.
So not to burden a long chain of tranmission gated propagation.
I also triple 1G66 propagation gates to better handle fanout...

CBT doesn't switch as fast, but far less series resistance.
Not entirely sure AUC is better. Depends chain length.

CBT slices are super easy to build.
Not AUC fast, and can't rotate right.
Even A+A requires pre-load B with A.
But low part count and 5V compatible.


74CBT3257 might be stronger for adjusting FLAG to make CBEQn=0.
Overflow (not drawn) is a simple XOR of CBEQ3 vs CBEQ4.

To ADD and nothing else, this slice might be faster.

Series prefixes are decoded for free, internally by MUX4.
Same for all above, even those wired to borrow or compare.

Welcome, Ken! And a big thank-you to you and to Squonk for your attention to this subject.

There actually is a 6502 connection! Back in 2015, forum member Drass presented a Logisim circuit which, with help from ttlworks and me, he eventually developed into a functional 6502 built mostly out of 74-series CMOS logic. The forum thread is here, there's a C74 web site here, and a 2018 video of Drass presenting a talk on the subject can be found here.

Not satisfied with the C74's 20 MHz operation (!), in 2020 Drass started a new thread to explore a dramatically faster approach in which the use of transmission-gate logic (FET switches) would be expanded to include the ALU. Squonk in turn became inspired and started this thread; also one which precedes it, 1-Bit FET-Switch Macrocell.

-- Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

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The least resistive and capacitive are N pass gate 74CBT overvolted to 7V.

Think of 74CB3Q internal charge pump power limit of 20 Megaswitch/Sec.
I don't want to be limited so few switch events, but resistance is crazy low.
Obviously these parts exist to prove VDD=7V without pump is worth trying.

Amazingly, I have a batch of CBT3253 that survive 7V magic smoke test.
Aside from lack of internal pump, probably the very same pass gate.
Series resistance only 3 Ohms while passing 5V through. Even less 2.5V.
Self-capping translation to whatever level passes is a feature, not a bug.

Attention needs given to capacitive burden upon the chain.
Abandoned 8way cause too many disabled gates remain wired.
Propagate or Replace should be no more than a 2way decision.
If you need more rules, hide them behind one disabled switch.

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AOI of any width can be done with discreet diodes, resistors, hex inverters.
Got 5000 Schottkys and tubes of 74S04 for that experiment some day.
Once you factor spaghettis, the plan unravels without a custom PCB.

OTOH, an entire slice of CBT fits on a generic SSOP to DIP28 converter.
Only 2 SSOP ICs with plenty o wiggle room between...

74AUC2G53 MUX2 propagate through 15 Ohm and 9pF CIO_ON
74CBT3253 TwinMUX4 propagate through 3 or 5 Ohm and 18.6pF CIO_ON
Maybe 4pF less CIO_ON, depending stuff the spec sheet isn't clear about.
Reading both TI and NXP sheets to help fill in those blanks...
Still, external spaghettis could easily be much worse than internal.

The asymmetry you mention, less resistance to GND than VDD.
Either might propagate faster from a pre-charged high state.
Not exactly Domino, but maybe interleave ALUs to pre-charge?
Give the idle ALU some dummy task that results in all Carrys...

Too much Sphagetti. Doubt IC parasitics are the limiting factor...

Too little Sphagetti. Unreproducible construction method...

Striking a better balance.

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