Well, I think I have a working 36MHz 6502 computer! DOM installed, run fine at 5V with 217mA current consumption. It will power up and load DOS/65 from DOM's system track. The software in DOM was for 14.7MHz system so the initial serial bit-bang transmitter is putting out garbage. It can be easily fixed by change couple variables in memory.
Here is a 20-second video of 36MHz 6502 hardware booting DOS/65 and run ASCIIART benchmark.
0:01 Power applied, retrieve program from DOM system track, gibberish output because the bit-bang transmitter is not set correctly for 36MHz.
0:05 started the TeraTerm macro script
0:07 transmitter was set to correct output at 36MHz clock
0:08 booted into DOS/65 and displayed directory of drive A
0:10 ran ASCIIART benchmark
This is still the CRC65 CPLD design so I need to change the memory map to maximize RAM space; I'll need to adjust software for 36MHz operation and after that I'll do pc board layout for a couple designs trying to get even more speed out of this design. I'm shooting for 40MHz operation.
Bill
Dec 18, 2022 edit: Created a
homepage for this prototype that has the design information as well as additional pictures.
Attachment:
36MHz_6502_boot_DOS_65_run_ASCIIART_benchmark.gif [ 2.38 MiB | Viewed 6507 times ]