banedon wrote:
Dr Jefyll wrote:
[...]
I had wondered (but clearly not long enough) as to why they had started introducing more power rail related pins. Good to know.
I use DIPs becasue it's just so much easier to swap out a duff part - but perhaps I should revisit that.
SOJ sockets are a thing!
So, the AS7C4096A doesn't
need to be soldered in place... although there are advantages to having it so.
Quote:
Can I get away with having a custom DIP pinout reflecting all of the pins on the AS7C4096A?
You mean create a new, improved adapter, whose DIP side has some extra pins connecting to the mobo? To make a significant difference, the changes would result in something of a monstrosity, I'm afraid. But if you haven't already, do be sure to mount two bypass caps on the adapter itself, one on each side of the SOJ IC and very close to it. That's if you decide to keep using the adapter. And if you ever swap out the adapter and insert an actual DIP ram, you might be forced to drop the clock speed. After all, it's the actual silicon die we need to connect to... and, on a DIP package, the (single, not multiple) Vcc and Gnd pins are each about an inch away from the die, and there's nothing that can be done about that.
If maximum clock rate is the goal, I'd seriously consider starting over. Begin by laying out a tight RAM/CPU/CPLD core, then then arrange Everything Else (including ROM) around it... ideally separated from the core by buffer ICs or at least damping resistors, and running with a wait-state. (And for the latter I'd maybe lean toward using the CPU's RDY input. A comparison of that technique vs. clockstretching can be found
here.)
-- Jeff
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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
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