MCL65+

Topics pertaining to the emulation or simulation of the 65xx microprocessors and their peripheral chips.
MicroCoreLabs
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Joined: 05 Oct 2017

Re: MCL65+

Post by MicroCoreLabs »

Quote:
Your hardware and software is almost everything I wanted to achieve.
Thank you the the kind words! I just happened to be the first to use it for a project like this. Other more clever implementations are sure to follow!

I have a number of these bare-boards if anyone would like a copy. All components are through-hole for easy soldering and the code is on GitHub.

Thanks,
-Ted
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Sheep64
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Location: A magnetic field

Re: MCL65+

Post by Sheep64 »

Firstly, I looked at your source code. I recommend splitting it into modules. For example, separate files for instruction decode, interrupts, cache and the memory interface. Interrupts require modification. Arguably, RESET should be handled like an interrupt. Regardless, RESET, NMI and IRQ may all occur repeatedly during normal operation and may all occur simultaneously. People often implement this wrong. You may gain insight and additional acceleration by reading about interrupt incompatibility in a TTL 6502.

Secondly, I investigated flashing a Teensy. I have a CLI environment which is suitable for flashing Atmel AVR (for Arduino Nano) and Atmel ARM (for Arduino Due). I hoped one of these would be sufficient for flashing Teensy but it appears that everything has its own incompatible protocol. Assuming that I am able to add a third protocol without destroying the first two, I will be able to flash Teensy, possibly with my own Arduino library which is not subject to LGPL.

Thirdly, I have an application and a paying customer for you. A friend spent a disproportionate amount of the 1980s playing Sargon II chess on a VIC20 and a Garry Kasperov branded Saitek "Electronic Chess Partner" which is probably a 6502 chess computer. My friend often played Sargon II chess at the most difficult level - and won. However, it could often take 36 hours or more to make a move. Therefore, my friend treated it a correspondence chess. Alternatively, my friend would play specific problems at lower difficulty and check the computer's response between watching films. My friend was unable to afford a chess accelerator in the 1980s and, anyhow, they had relatively limited acceleration. An MCL65+ is likely be faster than any chess accelerator from this period.

My friend has recently inherited a very large flat screen and it has an unused input which is compatible with a VIC20. We are now strongly considering purchase of a VIC20, and possibly some soldering braid to sponge away the solder of a NMOS 6502. If it doesn't work on arrival, regulars of the 6502 forum will enjoy a minor, collaborative restoration effort. Of particular interest would be a feature in MCL65+ to identify and patch a Sargon II chess cartridge to add more levels of difficulty. This would allow my friend to play the previous levels much faster or play a significantly more challenging game at historical speed. I looked at the manual and disassembly for Sargon II chess. The data structures remain a mystery to me but it appears to be a three-way alpha/beta prune with a 16 bit score on stack. It doesn't have a strong end game but raises the recursion limit when pieces are eliminated. This keeps the processing time relatively constant. Stack and the 16 bit score are unlikely to overflow if the recursion limit is raised.

Fourthly, whether or not my friend gets a VIC20 and joystick for chess, whether or not I can reflash a Teensy, I am strongly considering putting a MCL65+ in a Planck, although this mostly depends upon the surface mount components being pre-assembled. This might be the most significant interfacing of 6502 projects since a MOnSter6502 was placed in a Cactus. Whether or not I can obtain a functional Planck and whether or not MCL65+ and Planck are compatible, the 600MHz, dual issue, ARM M7 in a Teensy should be sufficient to run a 6502 or 6502 simulator with minimal loss of bus cycles. Indeed, your system is about 30 times faster than my previous target and gave me the confidence to exercise Wirth's law.

Anyhow, a suitably flashed Teensy in a 6502 adaptor socket is worth USD75 and may be used continuously by a friend. Do you accept Western Union?
MicroCoreLabs
Posts: 62
Joined: 05 Oct 2017

Re: MCL65+

Post by MicroCoreLabs »

Quote:
Anyhow, a suitably flashed Teensy in a 6502 adaptor socket is worth USD75 and may be used continuously by a friend. Do you accept Western Union?
Just $75 for for my MCL65+ which is worth thousands of dollars?? :)

Instead, how about a you send me your address over PM and I can send you a bare-board for free! I have at least five of them, so anyone else who would like one can PM me for a copy.

All components on the board are through-hole DIP, so very easy to solder together. All you would need are the parts from Mouser/Digikey and a Teensy 4.1.

Thx
-Ted
MicroCoreLabs
Posts: 62
Joined: 05 Oct 2017

Re: MCL65+

Post by MicroCoreLabs »

Hi,

I listed the MCL65+ bare boards on Ebay for anyone who wants to own one. Assembly required, however its only $5!

https://www.ebay.com/itm/154425026770

Thanks
-Ted Fried
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BigEd
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Re: MCL65+

Post by BigEd »

Selling like hot cakes already - thanks for making those available Ted.
schlika
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Re: MCL65+

Post by schlika »

I just came across your amazing project ... Would it be doable to make it emulate the 65C816 ? I have an Apple IIgs with missing CPU that would LOVE it ... Thanks a lot for your work !

And BTW do you still have a few boards ? I'll order some at JLC if not.
MicroCoreLabs wrote:
I have yet another update: https://microcorelabs.wordpress.com/202 ... -apple-ii/

Im happy to say that the MCL65+ 6502 emulation also seems to work in the Apple II+.

I was able to run in cycle accurate mode, and then I began mirroring address ranges from system DRAM into the core where reads are served by the internal RAM array, writes pass through to the system memory, and both are cycle accurate. After that I emulated all RAM and BIOS ROMs using the accelerated internal array which runs at 600Mhz. I was able to just leave the I/O and video memory ranges as cycle accurate while the rest was accelerated!

The results were pretty dramatic! I did some simple tests in BASIC where I measured about a 6X speed improvement when running in accelerated mode over the 1Mhz cycle-accurate mode...

Cycle accurate mode: https://www.youtube.com/watch?v=UuSb7mr ... e=youtu.be
Accelerated mode: https://www.youtube.com/watch?v=rvJsCMR ... e=youtu.be
20210107_183904.jpg
MicroCoreLabs
Posts: 62
Joined: 05 Oct 2017

Re: MCL65+

Post by MicroCoreLabs »

Quote:
I just came across your amazing project ... Would it be doable to make it emulate the 65C816 ? I have an Apple IIgs with missing CPU that would LOVE it ... Thanks a lot for your work !
I believe the 65C816 is not footprint compatible with the NMOS 6502, so the MCL65+ would not be able to be dropped-in. It probably wouldn't take much work to make a new version of the board to match this pinout!

Yes, all of the MCL65+ boards have been given away so the best way to get one would be to build more at JLCPCB. My last batch of five was around $20 including shipping! :)
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