Thinking a bit more about converting Tachyon over to the 65816 and after posting the VGA output of a Mandelbrot set and then thinking about how best to introduce video graphics I thought "What if I emulated the 65xx on a P2 and then used the P2 for graphics". Not only that but I could emulate VIAs and ACIAs too. So I will look into that by writing the emulator in Forth initially and then porting that to P2 assembly as required for more speed. Should be very interesting. I will have to think up a name for this project, something like 65P2 perhaps!

BTW, I got BASIC-256 to plot a 384x384 Mandelbrot set and it is still going an hour later, and that's on an i7 on Linux! It looks like it will take another hour. Tachyon on the P2 @300MHz did a 440x440 at the same zoom level in 10 seconds.

A 65p2 (6502 emulated on Propeller 2) would be very interesting!

Yes, we can kinda think of the P2 in the same way we think of an FPGA, just a lot friendlier to configure. In fact this is how we look at the P2 with its multiple cores and smart pins, as a cross between an FPGA and a regular micro. So the P2 "FPGA" will emulate the 65 core and provide graphics and I/O and of memory of course. It may even be possible to emulate the physical chip itself and that would certainly be interesting. So I would imagine at some stage a 40-pin carrier with connections for serial/graphics etc. The multiple cores along with the smart pins (which are like a peripheral in a pin x64) act as smart virtual peripherals. Just emulating a plain 6502 with its own 64k will be my first step.

(For some time I was following the progress of 6502 emulated on P1. It wasn't easy to find that discussion, because one forum member listed all projects in their signature. I'm not sure what the final state of play was.)

I remember a user called pullmoll and I tracked him down as Juergen Buchmueller who works on the MAME project and from there I find his repository https://github.com/pullmoll complete with emulations of scores of CPUs including the 6502.

Splendid!

The P2 has an XBYTE mode which is ideal for emulating instructions. Spin2 opcodes are executed this way so I expect to eventually write the 6502 emulation which could emulate a 20MHz 65816 possibly. That coupled with multiple cores and smartpins means I can emulate the typical peripherals as well as VGA. Because all these resources are implemented on the P2 rather than through it (as in an external CPU etc), it could probably make a mean Apple 11GS even. Maybe I could just shoot for Apple II emulation first.
Then who knows, a Mac on a chip!
I'm guessing this is going off sub-forum topic though