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PostPosted: Fri Feb 15, 2019 4:14 pm 
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Just seen this two page PDF from 1984 and thought it might be of interest:
Quote:
A LANGUAGE FOR DIGITAL DESIGN
Chuck Moore

SUMMARY
FORTH is a programming language with extraordinary versatility. I was reminded of this while designing the FORTH microprocessor. It has instruction decode based on random logic and I needed a way to document and verify this design.
Code:
0 ( Digital logic simulator )
1 : S. ( n) DUP 32768 AND IF ." +" THEN 32767 AND . ;
2 : _ ( n - n) 32768 XOR ;
3 : and ( n n - n) OVER 23767 AND OVER 32767 AND MAX
4 :  ROT 32768 AND ROT 32768 AND AND + ;
5 : or ( n n - n) _ SWAP _ and _ ;
6
7 ( Technology )
8 : 2AND_ ( n n - n) and _ 9 + ;
9 : 3OR ( n n n - n) or or 30 + ;
10 : 2XOR ( n n - n) OVER _ OVER and >R _ and R> or 35 + ;
11
12 ( Logic equations )
13 0 CONSTANT A 10 CONSTANT B 10 _ CONSTANT C
14 : ENB_ ( -n ) A B 2XOR ; ( 45)
15 : XY ( - n) ENB_ C 2AND_ A B 30R ; ( +84)

This block of FORTH code is the preposterously simple solution. At the top is a digital simulator that can combine signals and determine worst- case timing. In the middle is a description of the logic elements (Technology) to be used. At the bottom an example of two output signals determined from three inputs.


(I suppose "23767" is a typo)

The short paper concludes with:
Quote:
The point I want to emphasize is the ease with which a new arithmetic can be defined using the post-fix nature of the FORTH interpreter, and the readability of the resulting equations.


Other abstracts from the same conference:
http://soton.mpeforth.com/flag/jfar/vol ... tracts.pdf


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PostPosted: Fri Feb 15, 2019 5:58 pm 
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Just to be clear if you read the paper, what he's trying to figure out here is the delays involved when you stitch the logic gates together.

It doesn't simulate the circuit's logic itself.

It's still a clever process and show how Forth is adept at making simple Domain Specific Languages.


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PostPosted: Fri Feb 15, 2019 6:04 pm 
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Ah, thanks, so what we'd now call a static timing analyser, not a logic simulator.


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PostPosted: Fri Feb 15, 2019 6:20 pm 
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I guess this counts as documentation for those fluent in Forth, but even after staring at it for a few minutes, it's complete gibberish to me, LOL


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PostPosted: Fri Feb 15, 2019 6:22 pm 
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There's a bit of help on the second page!


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PostPosted: Fri Feb 15, 2019 10:07 pm 
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Arlet wrote:
I guess this counts as documentation for those fluent in Forth, but even after staring at it for a few minutes, it's complete gibberish to me, LOL

Even if you're fluent, it's all gibberish. It would be gibberish in any language, since there's no real context.

The article provides more context, then it's pretty simple.

But without it, yea, gibberish.


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