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PostPosted: Sun Oct 01, 2017 6:58 pm 
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As shown in http://forum.6502.org/viewtopic.php?f=10&t=4925, I have Tali Forth running on my CHOCHI E board, after updating the CHOCHI board with a new bitstream that uses the 65c02 design from https://github.com/hoglet67/verilog-6502.

At the moment I have a small problem, related to the Forth words IS and ACTION-OF, which are compiled into the process at startup. If I leave those in, I get an error like the screenshot below. If I comment them out, I can add them into the system by pasting them into the REPL (or whatever it is called in Forth).
Attachment:
Chochi-E-Tali-Forth-Err.png
Chochi-E-Tali-Forth-Err.png [ 13.74 KiB | Viewed 4957 times ]

Any ideas about what might be happening here?


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PostPosted: Tue Nov 14, 2017 11:40 am 
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Sorry for the very, very late answer -- did you find out what is wrong?


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PostPosted: Tue Nov 14, 2017 10:07 pm 
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scotws wrote:
Sorry for the very, very late answer -- did you find out what is wrong?


Not quite - I've found that if I disable the compilation of the compilation of the "high-level commands", I can then add them manually after Forth has been initialized. So, it looks like the command sequences work when given interactively, but not if done as part of the startup.

I've tested with py65mon. That works as it should, so there's probably something wrong with either my FPGA setup, my low-level IO code or the way I've set up Tali-Kernel and Tali-Main for CHOCHI.


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PostPosted: Wed Nov 15, 2017 5:06 am 
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Martin was having a somewhat similar problem in this thread. There seemed to be an issue with the state of STATE?

Mike B.


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PostPosted: Wed Nov 15, 2017 9:30 pm 
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barrym95838 wrote:
Martin was having a somewhat similar problem in this thread. There seemed to be an issue with the state of STATE?

Mike B.


That seems eerily close to what I've been seeing; I'll start digging. Thanks!


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PostPosted: Thu Nov 16, 2017 2:12 pm 
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This does sound similar. Did that line of code make it upstream?


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PostPosted: Fri Nov 17, 2017 6:23 am 
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After some more checking & testing, I see that STATE has the right value (0) while compiling the Forth forms.

Last night I tried aligning the strings holding the Forth forms on page boundaries, and that got rid of the problem. No real idea why that happened, but I suspect that it may be HW rather than SW - I'll try reducing the clock speed on the CHOCHI to 30MHz or so and see what happens. I should probably also figure out a way to run the 65c02 functional tests on the CHOCHI.


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PostPosted: Fri Nov 17, 2017 1:03 pm 
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Thanks for checking that -- I though, as Martin said, that we got rid of that bug.

My big project for the winter is to rewrite Tali with what I have learned from Liara, and I'll try to make the whole design cleaner and especially more robust. Any feedback to that effect would be very welcome!


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PostPosted: Mon Mar 26, 2018 7:26 pm 
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Looks like I have (finally) solved this: by comparing the constraints file for the CHOCHI E with CHOCHI K, I found that there were some differences with signal settings (levels, slew rate, drive strength, ...)

By copying settings from the CHOCHI K code, I got a version of the CHOCHI E that seems to be able to run Tali Forth and Tali Forth 2!


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PostPosted: Tue Mar 27, 2018 9:27 am 
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Great to hear! Any problems setting up the kernel stuff with Tali 2?


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PostPosted: Tue Mar 27, 2018 10:54 am 
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scotws wrote:
Great to hear! Any problems setting up the kernel stuff with Tali 2?


Not really - I had to jump through a few hoops to avoid the CHOCHI IO area at c0xx, but that was it:

  • Move the kernel down from E000 (i.e, place it straight after the rest of the code).
  • Prepend a small segment below 8000 for setting up the vectors and then jumping to kernel_init.

Tali 2 looks great so far!


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