FIG Forth Editor

[enso]

Does anyone have the screen editor working?

[whartung]

Here you go:

This is a text listing of the first 20 screens which is mostly the editor, but it's also the error messages.

http://db.tt/Bl38flmp

Also, here's a "Forth Disk", which has 50 1K pages, in BLOCK format, 16 lines of 64 characters, all blank padded, no new lines, so you can have it in "binary" form if you can somehow mount this. This is what I generated the listing off of.

http://db.tt/6RQ3gy98

This listing was keyed in by me using my Forth against my Disk, from the source (I found it somewhere on line, I don't recall where). I keyed in the minimal words necessary to insert text directly in to the interpreter, then executed them to key in the entire editor.

Editor starts on Screen 10

I notice on screen 19 that I missed the preceding : for the F definition. Also seem to be missing a --> on screen 17.

I never worked with it much after I got it keyed in. But as I recall it's pretty accurate from the source.

[enso]

Thanks!

I will have to wait until I am done with an SD card interface to really try this out...

[GARTHWILSON]

I'll be very interested in your SD-card interface!

[enso1]

enso wrote:

I will have to wait until I am done with an SD card interface to really try this out...

Little did I know it would take me 12 years! But better late than never I suppose.

My SPI/SD card interface works, I managed to load pages of Moby Dick (I stuck it into the file on the SD card just to get going) using BLOCK...

[SamCoVT]

Also, we're still interested in your SD card interface 12 years later!

[enso1]

This repo https://tildegit.org/potato/TangNano20K ... xperiments contains the SPI/SD interface, a test program, as well as a figForth patched to hopefully work with an SD card (I don't have a screen editor).

The hardware is really simple, a byte shift register with clocking and handshaking. It takes about 21 luts and 16 registers on my system. Very generic verilog, should work on any FPGA.

The driver fits into a 256-byte page, containing SDcard startup and read/write sector. See soft/spi/ or the bootrom where it's integrated.

Code: Select all

module SPI(
  input  clk,
  output pin_clk,
  output reg pin_MOSI,
  input  pin_MISO,
  input  [7:0] mosi,
  output [7:0] miso,
  input  write,         // 1 means start transfer
  output ready,         // 1 means byte ready on miso
  input  slow
);
reg pin_in;
//                   v_bbb_C_ccccccc
reg [11:0] cnt = 12'b1_000_0_0000000; //  
assign pin_clk = cnt[7];   // SPI clock
assign ready =   cnt[11];  // after 8 bits shifted goes high

reg [7:0] data = 8'b00000000;
assign miso = data;
wire [11:0] next;
assign next = cnt + 64; //(slow ? 1 : 64);
always @(posedge clk) begin
  pin_in <= pin_MISO;
  if(write) begin   // trigger on completed = start!
    data <= mosi;                   // load data for output
    cnt  <= 12'b0000_0000_0000;      // 
  end

  if(ready)
    pin_MOSI <= 1'b1;
  else begin
    cnt <= next;
    if((cnt[7]==0)&&(next[7]==1)) begin   // UP transition
      pin_MOSI <= data[7];
      data     <= {data[6:0],pin_in};
    end
  end

end
endmodule

I am including it here because in another 12 years who knows what external repos will be around... The figForth screen files above are sadly gone!

[SamCoVT]

I see - so you're using a softcore 6502 and your SPI interface just shows up in the memory map as these specific memory locations:

Code: Select all

SPI_DATA        equ   IO_PAGE + $10
SPI_CTL         equ   IO_PAGE + $11

Other than that, I think your software looks like the standard "poke and prod an SD card enough to get sectors in and out" that I ended up with as well, although my SD card was attached to a port on a 65C22 so I was bitbanging the SPI whereas you have verilog-based hardware to do that for you.