Hi all! First post here and it's because I need a bit of help.

Is anyone familiar with writing Logisim libraries? I've written a (half) cycle accurate 65c816 emulator that I had intended to drop into Logisim but I do not understand how Logisim's port propagation works.

If you take a look at the image below you'll see that the value on the bus port D is 'C9' but the value I read off that port is zero. 'C9' does eventually appear on the port but only after I'm long done ticking the CPU.



I'm guessing it's because it takes a while for the simulation to settle between each clock tick but I'm at a loss as to how to handle it.

Any help would be great! Ta, Andrew

Welcome, Andrew, sorry to say I can't help. Is there a waveform view or similar which will show the time-varying behaviour of the bus?

As the databus is bidirectional it may need special handling of some kind: event driven simulators don't always have a graceful way to handle data propagation in both directions.

Hey BigEd, thanks for the welcome. I was putting together a (kind of) time based view thing when I got distracted by something I broke. I'll post it either tomorrow or the weekend depending on how long it takes clean it up and make it human readable.

I'm pretty sure you're right that it's got something to do with bidirectional data (and how that complicates how long it takes for the simulation to settle).

I don't know how Logisim does its thing, but some simulators will distinguish minor iterations that are needed to get values to settle from major iterations which move time forward. So, time would not elapse even if it takes some work to figure out the next state.

Does Logisim model propagation delays at all?

Logisim does model propagation delays but only in certain limited circumstances - circumstances I can't find any real documentation on.

However all of that said I think it's a much simpler program bug on my part. I've been using Solra Bizna's 6502 Logisim emulator as an example and, reduced to the simplest possible state of just reading the data bus, his works and mine does not. Even though they look pretty much identical to me. I'm just going keep slogging looking for the difference. It could be worse, I could not have a working example to compare mine to

Just for interests sake I've fixed up the circuit a bit and included the (working) 65C02 so I run the two side by side.

It finally works!

In the end it turned out it was 'just' a Logisim propagation issue. The short of it is that doing a read from memory takes a few steps to settle before the propagation cycle ends. However I only want the CPU to truly tick on the very last cycle once everything has settled. A bit of a problem as Logisim doesn't seem to have hooks for notifying me when a propagation cycle is starting or for when it's done.

Still a small hack and I can tell I've transitioned from a stable state to a new propagation cycle. Built on that is a slightly larger (but pretty robust) hack that only moves the CPU into its new stable state at the start of the next propagation cycle rather than at the end of its actual propagation cycle.

Long story short: WHY DID WDC MULTIPLEX OUT THE BANK ADDRESS ON THE DATA PINS, why not re-use the address pins instead? Gaaaaaa! Writing out the BA on the data pins a half-cycle before a read on those same pins caused Logisim no end of grief. But in the end any complex circuit with half-cycle reads/writes would have been a problem - regardless of the pins multiplexed. It's probably better I discovered that sooner rather than later.



Above you can see a simple circuit that correctly latches in the Bank Address (zero in this case) when the clock is high and also correctly reads 2b out of memory when the clock is low. It happens to be pulling the low byte of the RESET vector in the picture. That was quite an adventure

A bit later I'll post up some of the timings from the little program I'm running as I'm quite chuffed with it. Right now, it's supper time

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Ah. Yes. That's a good point. Oops.
I'd also dearly love a non-multiplexed version; I guess that's a common comment.

I finally solved the hacks I mentioned previously. I needed to make a tiny change to Logisim to get the event hooks I wanted (a literal 4 line change). I've submitted a pull request for that change so hopefully it will be included in the next release.

For now, at least in terms of emulating the WDC65C816, I'm declaring it "good enough". The emulation works with the simple program I need to test address decode circuitry* and interrupt vectors.



I'm now pretty good at banging out Logisim components so I've added the standard latch and transceiver suggested in the datasheet as a kind of proof of concept. Eventually I'm going to code up all the ICs I think I'll need.

If anyone REALLY wants these components now drop me a message and I'll point you to them but I've still got a lot of cleanup to do before I want to do a public release.

*If anyone has a functional test suite of 65816 opcodes that would be great though.

> If anyone has a functional test suite of 65816 opcodes that would be great though.

Dave/hoglet reminds us of Drass' current efforts towards an '816 test suite:
viewtopic.php?p=87939#p87939

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That's excellent! Thanks for pointing me there (and I should probably go drop a message in Drass' original thread)

Yup, I was tired and having a frustrated-with-Logisim-brain-shutdown moment. I really wish the 65C256 was less microcontroller'y and more a 65C816 with 24 address pins and a bunch of separately vectored priority IRQs. That would be perfect for me

Tiny update I'm using mostly as an excuse to post more pictures.

The pull request I submitted was rejected which I kind of both can and can't be a bit miffed about. I didn't follow their coding guidelines even though I'd followed an existing pattern. That shouldn't have been a problem; I just had to rename the bad method and commit. Except I'd done a bunch of other experimenting in the branch I'd submitted and that would have all gone too. In the end I got into such a tangle of branches trying to get only the commits I wanted that I had to delete and re-fork the whole project. Gah.

On the brighter side I may have found a better work around if my new pull request is also rejected. It's not pretty but seems to be the existing pattern (again) for determining if the simulation has completed a tick.



The EconoReset was a bastard to write. A component without a connected clock does not tick but the EconoReset should be it's own clock and tick internally for however long the reset line needs to be held low. In the end I finally just embedded a clock in the thing and gave up.

I only post here to remember all of you that the w65c265 is a MCU offered in 84 pin PLCC or 100 pin QFP packages, that features a full exposed 24 bit address bus with no need of demultiplexing at all.

AFAIK you can use it as a regular '816 if you program it to behave as such during boot by the use of an external ROM.

It features an internal chip select mechanism but if you decide to use it as a '816, then you should manage the chip selects externally as you would do with an standard '816.

People with more experience that me (easy to find) will tell about logic or coding differences between an '816 and the '816 core inside the '265.

I asked WDC about the MCU and they said that right as it's being sold, is just a development platform, not focused to hobbyists or consumers but developers that would use it to refine and debug a code up to the point of being definitive or RELEASE, and then ask WDC for a quote of a custom design where the internal monitor ROM would be replaced by the custom ROM, and then, things like 576 bytes of RAM would make sense in the MCU workd.

Thanks, I saw it and took a look at it some time ago. And (if memory serves) it had two problems for what I want to do. It is too expensive (I'm going to ultimately be using five 65816s if I can actually make things work and that's a significant cost). And two it's top speed is officially 8MHz; I'm going to need to use an asymmetric duty cycle with the low part of the cycle running at an effective 25Mhz. I'm pretty certain the W65C816S6TQG-14 will be able to handle it but I'm not certain about W65C265.