hi every body
I am trying to simulate each instruction of the 6502 in C ( open watcom v1.8 )
by using inline assembly , my question is that :

are the 6502 branch instructions equal (the same) to the X86 jump short instructions ?

Hopefully someone will give a better explanation comparing to x86; but the operand on 6502 relative-branch instructions is an offset relative to the first byte of the next instruction, meaning for example D0 00 (ie, BNE next_instruction) is a branch with no effect. An operand with the high bit set is to branch backwards; so D0 FE will conditionally branch back to itself.

No 6502 / 65c02 / 65816 programmer should be without the programmer's manual "Programming the 65816—Including the 6502, 65C02 and 65802" by David Eyes and Ron Lichty. It's way better than any other I know, and way better than the description lets on.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

OK
then how to implement 6502 branching in C (if not in inline assembly) ?
is the following code do the job ? :-



your suggestions please .

It would appear 8086 short jump and the 6502 branching instructions calculate their offsets the same way.

Using the build in assembler in BBC basic, I've produced 2 simple bits of code:

BBC Basic for DOS Produced:


While BBC Basic on the 6502 produced:


The 4 byte backward branch on both CPUs usees an offset of &FC

I don't see anyone mentioning page crossing
behavior?
Dwight

that is what I have expected , so could I depend on that and continue ?

Crossing a page boundary adds one cycle to the branch, from three cycles to four, for 65(c)02 and for the 65816 running in emulation mode. The 65816 running in native mode doesn't need the fourth clock. Regardless, most branches do not cross a page boundary.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I was talking about when the instruction it self crosses an page boundary. I recall that it had a similar
problem the the NMOS parts had for the indirect jump instruction where it didn't see that the high part
of the PC had changed and didn't do a correct page crossing.
I could be wrong because it has been many years. It may only be the indirect jump that had the problem.
Dwight

That was on JMP(xxFF). NMOS did not increment the page when reading the second byte, so the jump was wrong. That bug (and all others) were fixed in the CMOS version. There was no bug in the branch instructions though. I rounded up all the NMOS-CMOS differences I could find and put them on the page http://wilsonminesco.com/NMOS-CMOSdif/ .

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I was in error this only effects the indirect jump and not the branch.
I don't know why I thought this.
I just ran the experiment so I'm sure I was in error.
Dwight

In a simulator, it might be better to increment the PC after each
instruction fetch. That way, all you have to do is add the branch offset as
a signed byte to the PC. If bit 8 changes in the PC add the
extra cycle to your cycle counter.
All this within C.
Oops, I just reread your original post. Are you simulating from
the text or the binary image after the assembly?
Dwight

Dwight
thanks for reply , all reading done as binary .

Then what I suggested should work fine.
I do hope you have a cycle counter. You also want an
easy way to connect to it with user code. Outside interaction
is the most important part of a simulator.
With the cycle count, you can tack on things like a usart, video
action or even a random input timed keyboard. Without it
it just runs instructions and little else.
Dwight

OK , but I have no idea how to count cycles .