Status register and 0x30

[BobLoblaw0101]

This is perhaps a stupid question but:

Consider that the status register is defined as:

7 6 5 4 3 2 1 0
S V - B D I Z C

If I do the following code:

LDA #$00
PHA ; Push 00 to the stack
PLP ; Pop 00 into the status register

I now see the status register being 0x30. This means that bit 5 (reserved) is set and bit 4 (break) is set. I've seen this behavior on two different emulators. Based on the code above, shouldn't the status register be 0x00? I can't seem to find any CPU documentation discussing this 0x30 value.

I thought bit 4 can only be set with a BRK instruction. Why does it get set in this case? Also, why is the reserved bit (bit 5) set?

Thanks in advance.

[GARTHWILSON]

The B flag does not physically exist in the processor. It is only a position in the status byte that gets pushed when there's an interrupt; so to test it, you have to do PLA PHA AND#$10 from the ISR when status is at the top of the stack. PHP PLA AND#$10 won't work. There's an article on 6502 interrupts on this site at http://6502.org/tutorials/interrupts.html . Enjoy my outdated cartoons!

To prevent confusion, make sure you call the high bit of the status register "N" (for "negative") as is standard, not "S" which is the stack pointer.

[BobLoblaw0101]

GARTHWILSON wrote:

The B flag does not physically exist in the processor. It is only a position in the status byte that gets pushed when there's an interrupt; so to test it, you have to do PLA PHA AND#$10 from the ISR when status is at the top of the stack. PHP PLA AND#$10 won't work. There's an article on 6502 interrupts on this site at http://6502.org/tutorials/interrupts.html . Enjoy my outdated cartoons!

To prevent confusion, make sure you call the high bit of the status register "N" (for "negative") as is standard, not "S" which is the stack pointer.

So does that mean that there is no way to set the status register to 0x00? In other words, an emulator should always return the B bit and the reserved bit to ON?

[Klaus2m5]

The emulators just follow the behavior of a real 6502 or any of its hardware successors. The unused bit returns a 1 when read, because it is not present in hardware and reading an open circuit simply returns a logic high state. The same is true for the break bit, as it is not an existing flag bit register but a forced low to an otherwise open circuit. The bit is forced low only when the processor flag bits are pushed onto the stack during either an IRQ or a NMI. So the break bit would be better defined to signal "pushed by software" (BRK or PHP only).

Garth was a little bit faster but I post my answer anyway.

[BobLoblaw0101]

Klaus2m5 wrote:

The emulators just follow the behavior of a real 6502 or any of its hardware successors. The unused bit returns a 1 when read, because it is not present in hardware and reading an open circuit simply returns a logic high state. The same is true for the break bit, as it is not an existing flag bit register but a forced low to an otherwise open circuit. The bit is forced low only when the processor flag bits are pushed onto the stack during either an IRQ or a NMI. So the break bit would be better defined to signal "pushed by software" (BRK or PHP only).

Garth was a little bit faster but I post my answer anyway.

Okay that makes sense. Thanks guys!