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org
 Post subject: Re: Breaking 6502 apart
PostPosted: Mon Mar 11, 2013 12:42 pm 
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I still can't fully understand execution order :)
In top part I have problems with flags input/outputs (still dont know what to do first - input flags from databus, or output current flag values)
In bottom part I have bunch of control lines which can lead to bus conflicts, for example :
If X/SB and Y/SB are become asserted at same time they encounter bus conflict (X and Y are put on SB at same time).

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BigEd
 Post subject: Re: Breaking 6502 apart
PostPosted: Mon Mar 11, 2013 1:07 pm 
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Ah, yes, outside of normal operation there could be bus conflicts - the undefined opcodes may do this - and you'll most likely get either an AND or an OR of the various writers.
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 Post subject: Re: Breaking 6502 apart
PostPosted: Mon Mar 11, 2013 1:12 pm 
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Quote:
and you'll most likely get either an AND or an OR of the various writers

I will apply "ground wins" rule :)

BTW, I updated PSD sources too : http://breaknes.com/files/6502/6502.zip [150 MB]

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 Post subject: Re: Breaking 6502 apart
PostPosted: Wed Mar 20, 2013 5:36 am 
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NMI pad logic

Transistor schematics:
Image

Logic circuit:
Image

After removing inverters it turned out to be D flip/flop :D
Image

Image

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 Post subject: Re: Breaking 6502 apart
PostPosted: Thu Apr 18, 2013 10:45 am 
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- Complete decoder labels
- Fixed names for /T0, /T1X and T1 lines

Latest version here : http://breaknes.com/files/6502/6502.jpg

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org
 Post subject: Re: Breaking 6502 apart
PostPosted: Fri Apr 19, 2013 11:02 am 
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Image

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 Post subject: Re: Breaking 6502 apart
PostPosted: Wed Apr 24, 2013 7:38 pm 
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Image

Image

Image

This is logic circuits.

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BigEd
 Post subject: Re: Breaking 6502 apart
PostPosted: Wed Apr 24, 2013 8:30 pm 
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One small point - for a transparent latch, I've seen a symbol used where the clock input is marked with a half- square, instead of a triangle. The triangle means it's an edge-triggered flop.
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Ed
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zellyn
 Post subject: Re: Breaking 6502 apart
PostPosted: Wed Apr 24, 2013 9:04 pm 
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The triangle looks like half a square to me... :-p
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BigEd
 Post subject: Re: Breaking 6502 apart
PostPosted: Wed Apr 24, 2013 9:35 pm 
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Funny!
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 Post subject: Re: Breaking 6502 apart
PostPosted: Thu Apr 25, 2013 4:55 am 
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Quote:
The triangle means it's an edge-triggered flop.

Thanks, didn't know this detail )

Those D-triggers are implemented as floating gate transistors. And its level-triggered of course. Is there any better way to represent it as logic block ?

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Dr Jefyll
 Post subject: Re: Breaking 6502 apart
PostPosted: Thu Apr 25, 2013 1:44 pm 
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Attachment:
latch_symbol.png
latch_symbol.png [ 1.67 KiB | Viewed 1238 times ]
BigEd wrote:
for a transparent latch, I've seen a symbol used where the clock input is marked with a half- square
Like this, then? Up until now I've just used "LE" to label such an input, but a symbol would be preferable.

Cheers,
Jeff

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BigEd
 Post subject: Re: Breaking 6502 apart
PostPosted: Fri Apr 26, 2013 12:28 am 
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That's exactly what I've seen before, thanks Jeff. I couldn't find it though. What I did find was the idea of using a plain input called "E" instead of a triangle-marked input.
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Ed
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Dr Jefyll
 Post subject: Re: Breaking 6502 apart
PostPosted: Fri Apr 26, 2013 1:34 am 
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BigEd wrote:
I couldn't find it though. What I did find was the idea of using a plain input called "E"
Ditto on both points! -- I did a search and found the "E" suggestion but not the symbol. So, I drew one myself. Glad you like it! :D

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 Post subject: Re: Breaking 6502 apart
PostPosted: Fri Apr 26, 2013 5:08 am 
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Fixed) I found "custom element" in circuitlab and made "E" input.


Attachments:
6502-predecode-logic.png
6502-predecode-logic.png [ 38.77 KiB | Viewed 1209 times ]
6502-instruction-register.png
6502-instruction-register.png [ 40.11 KiB | Viewed 1209 times ]
6502-long-cycle-counter.png
6502-long-cycle-counter.png [ 69.71 KiB | Viewed 1209 times ]
rdy-pad.png
rdy-pad.png [ 5.37 KiB | Viewed 1209 times ]

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