My emulator works in a similar way. I use a 256 instruction jump table to a piece of code that consists of two macro calls. For example:
Code:
LDA_IMM:
_IMM
_LDA
bra Execute
LDA_ABS:
_ABS RD_ADDR
_LDA
bra Execute
The address macro computes the physical memory address corresponding emulated target address ready for the instruction to access. I had to add a parameter the memory address mode because the PIC I'm using needs to know if the final address will be read (LDA) or written (STA) or both (INC/ROL).
Originally I had two subroutine calls but to minimise execution time I went for macros in the end. I also use the devices processor flags for NZVC and generate P only when needed.