Hi!



Yes, the up5k is a slow FPGA, you can't reach very high speeds in the 6502 core.



I'm running the P&R with constraints in the two clocks: VGA clock (25.2 MHz) and CPU clock (12.6 MHz), the output of nextpnr is:



So, I have slack in both clocks. The SRAM in the iCE40 is at the boundary, so you have to cross throw the chip to access it, but it has a fast access time of about 7ns (and 70MHz cycle time).

Have Fun!

If you want more RAM, Xilinx's website tells me that there's a Spartan 7 in the same package with 45 BRAMs of 36Kb each. And if you can cope with 0.5mm ball pitch, there's an Artix in a (physically) smaller package with 75 of them. That's 180KB and 300KB respectively. They're not exactly cheap (especially the Artix). And I imagine the 65F02 would require extensive tweaking to get the most out of them.

I have looked at the XC7S25, and even installed Vivado to play with it. Besides the higher price, availability of the faster speed grade parts scared me off: Mouser has a few of them on the shelf, but already knows that the next batch will only arrive in spring of 2021. That's a loong lead time for an active part... And the Spartan-7 requires three instead of two different supply voltages for Core, Aux and I/O, which I found a bit annoying.

Unfortunately 0.5 mm pitch seems out of reach when using the low-cost PCB houses. Their design rules (5 mil trace/gap, 0.4 mm via annulus) don't allow traces or vias to be fitted between the pads. A pity, since that limits the choice of FPGAs quite a bit. On the other hand it's amazing how far the low-cost capabilities have evolved over the past few years. And my own capabilities in hand-placing and pizza-oven-soldering might not be adequate for 0.5 mm BGAs anyway...