Firstly, I looked at your source code. I recommend splitting it into modules. For example, separate files for instruction decode, interrupts, cache and the memory interface. Interrupts require modification. Arguably, RESET should be handled like an interrupt. Regardless, RESET, NMI and IRQ may all occur repeatedly during normal operation and may all occur simultaneously. People often implement this wrong. You may gain insight and additional acceleration by reading about
interrupt incompatibility in a TTL 6502.
Secondly, I investigated flashing a Teensy. I have a CLI environment which is suitable for flashing Atmel AVR (for Arduino Nano) and Atmel ARM (for Arduino Due). I hoped one of these would be sufficient for flashing Teensy but it appears that everything has its own incompatible protocol. Assuming that I am able to add a third protocol without destroying the first two, I will be able to flash Teensy, possibly with my own Arduino library which is not subject to LGPL.
Thirdly, I have an application and a paying customer for you. A friend spent a disproportionate amount of the 1980s playing Sargon II chess on a VIC20 and a Garry Kasperov branded Saitek "Electronic Chess Partner" which is probably a 6502 chess computer. My friend often played Sargon II chess at the most difficult level - and won. However, it could often take 36 hours or more to make a move. Therefore, my friend treated it a correspondence chess. Alternatively, my friend would play specific problems at lower difficulty and check the computer's response between watching films. My friend was unable to afford a chess accelerator in the 1980s and, anyhow, they had relatively limited acceleration. An MCL65+ is likely be faster than any chess accelerator from this period.
My friend has recently inherited a very large flat screen and it has an unused input which is compatible with a VIC20. We are now strongly considering purchase of a VIC20, and possibly some soldering braid to sponge away the solder of a NMOS 6502. If it doesn't work on arrival, regulars of the 6502 forum will enjoy a minor, collaborative restoration effort. Of particular interest would be a feature in MCL65+ to identify and patch a Sargon II chess cartridge to add more levels of difficulty. This would allow my friend to play the previous levels much faster or play a significantly more challenging game at historical speed. I looked at the manual and disassembly for Sargon II chess. The data structures remain a mystery to me but it appears to be a three-way alpha/beta prune with a 16 bit score on stack. It doesn't have a strong end game but raises the recursion limit when pieces are eliminated. This keeps the processing time relatively constant. Stack and the 16 bit score are unlikely to overflow if the recursion limit is raised.
Fourthly, whether or not my friend gets a VIC20 and joystick for chess, whether or not I can reflash a Teensy, I am strongly considering putting a MCL65+ in a
Planck, although this mostly depends upon the surface mount components being pre-assembled. This might be the most significant interfacing of 6502 projects since a
MOnSter6502 was placed in a Cactus. Whether or not I can obtain a functional Planck and whether or not MCL65+ and Planck are compatible, the 600MHz, dual issue, ARM M7 in a Teensy should be sufficient to run a
6502 or 6502 simulator with minimal loss of bus cycles. Indeed, your system is about 30 times faster than my previous target and gave me the confidence to exercise
Wirth's law.
Anyhow, a suitably flashed Teensy in a 6502 adaptor socket is worth USD75 and may be used continuously by a friend. Do you accept Western Union?
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