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 Post subject: Visual6502 questions
PostPosted: Thu Apr 04, 2019 10:01 am 
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Posts: 20
I was looking through the Visual6502 simulation and few questions came to mind that I can't seem to figure out.

1. Protection material. This is the only material that was not explained in the visual circuit tutorial (on nesdev, iirc). How does it work? I saw one schematic display it as n-type mosfet with gate connected to ground, but I'm not sure if that is right.

2. Bus precharging. The precharge mosfet was simply a mosfet connected to power diffusion and gate to cclk. How does the precharger know if the bus should be charged or not? Or is there something that drains the precharge if that line is supposed to be low?

3. Pass mosfets. Since these are just polysilicon between two busses, how is it made sure that the charge is transferred to correct direction? Just activating the pass mosfet seems like it might pass charge inconsistently in tersms of the direction it should be passed.

4. cclk pin. Since the 6502 already has clk1out and clk2out, what is the point of having cclk pin as well? How does it actually differ from clk2out?

5. "Broken" connections. There are few spots in the simulator that seem to have connection between polysilicon and metal, but thay connection is broken when you try to highlight it. Is there a connection or is both not highlighting just a bug in the simulator?


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 Post subject: Re: Visual6502 questions
PostPosted: Thu Apr 04, 2019 11:32 am 
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Joined: Thu Dec 11, 2008 1:28 pm
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Hello, and welcome!

FreyFox wrote:
I was looking through the Visual6502 simulation and few questions came to mind that I can't seem to figure out.

1. Protection material. This is the only material that was not explained in the visual circuit tutorial (on nesdev, iirc). How does it work? I saw one schematic display it as n-type mosfet with gate connected to ground, but I'm not sure if that is right.

A MOSFET is a three-terminal device, but if you connect the gate to one side, it becomes a diode. It's useful (and normal) to put a diode on inputs, so any extra-high voltage applied to the pin gets shunted to the rail instead of damaging the gate oxide of functional transistors.

Quote:
2. Bus precharging. The precharge mosfet was simply a mosfet connected to power diffusion and gate to cclk. How does the precharger know if the bus should be charged or not? Or is there something that drains the precharge if that line is supposed to be low?

The precharge transistor doesn't need to know anything: when the gate is high, the transistor conducts, so current will flow from the supply rail to the bus until the bus is charged. When the gate is low, the transistor is off, so the bus is free to be pulled up or down by whichever other devices are connected.

I think it turns out that sometimes some drivers will be pulling down at the same time as the precharger is pulling up: that represents a waste of energy, and means the bus can't be pulled up very far. But once the precharger is off, the pulldowns will finish their work and the bus will go to a low value.

It's important that the bus value isn't read by anything important during the precharge phase, only during the other phase.

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3. Pass mosfets. Since these are just polysilicon between two busses, how is it made sure that the charge is transferred to correct direction? Just activating the pass mosfet seems like it might pass charge inconsistently in tersms of the direction it should be passed.


It's sometimes best to think of a MOSFET as a variable resistor, not as a current source. If the gate is high, the resistance is low, and current will flow in one direction or another, usually until the two sides have equal voltage. It's good to be clear that the direction of current flow is not the same as the direction of logical communication: if the bus on the left is driving low and needs to discharge the bus on the right, then current will flow to the left. And if the left is driving high and needs to charge the bus on the right, then current will flow to the right. Normally one side will be driving and the other side will be driven.

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4. cclk pin. Since the 6502 already has clk1out and clk2out, what is the point of having cclk pin as well? How does it actually differ from clk2out?


I think there are as many as four pads on the chip for clocks because the design is meant to be minimally changed to make a 6501 or a 6502. (The 6501 was discontinued shortly after introduction because of the lawsuit from Motorola.) Note that a pad on the chip may or may not have a bond wire to connect to a pin on the package. There are some notes here which might be useful:
http://visual6502.org/wiki/index.php?ti ... es_of_6501

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5. "Broken" connections. There are few spots in the simulator that seem to have connection between polysilicon and metal, but thay connection is broken when you try to highlight it. Is there a connection or is both not highlighting just a bug in the simulator?

If the two parts are connected in the simulation, they will highlight together. If there is a missing connection, that would be very interesting! Please share a URL to the location using the 'Link to this location' feature (underneath the layout window.)

Hope this helps
Ed


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 Post subject: Re: Visual6502 questions
PostPosted: Thu Apr 04, 2019 3:42 pm 
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I can't find the other disconnected part now, but the other one was explained in the link you posted.

By the way, does this diffusion have any use at all? http://visual6502.org/JSSim/expert.html ... &zoom=12.4
Another question is that is the CPU core in the 2A03 identical to the 6502 or are there some changes that I should know of besides the stuff that was added around it?


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 Post subject: Re: Visual6502 questions
PostPosted: Thu Apr 04, 2019 4:16 pm 
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Hmm, interesting, so node 633 looks like it ought to connect to the cclk pad and node 1059 looks like it ought to be a VDD-connected part of a pullup structure. I think the answer is on this page
which shows how pad 37 is wired differently when the die is a 6501.

FreyFox wrote:
Another question is that is the CPU core in the 2A03 identical to the 6502 or are there some changes that I should know of besides the stuff that was added around it?

Very nearly identical: we saw a couple of polygons were shifted to improve spacing, and some polysilicon is removed to disable decimal mode.


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