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PostPosted: Thu Nov 14, 2024 1:19 pm 
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Joined: Tue Feb 07, 2023 12:27 pm
Posts: 49
While testing my simulator based on ST32 for certain numbers I received different results, generally they were higher (+$10). For example.
Code:
SED
SEC
LDA#$0F
ADC#$0B


gives me A=$11, and in Kowalski Simulator A=$21
I decided to check the operation on Real 6502 (unfortunately I do not have real 65816 to check the result) and it turned out that the result is A=$11, i.e. the same as in my simulator.
It is similar for numbers in A=$1F,$2F,...
Interestingly, in Supermon816 it also receives different results, e.g.
as a result of the command
+1115, my stm32 receives +1215 (HEX and BIN is OK), and Kowalski simulator gives +1115
But, theoretically Supermon816 the Kowalski simulator result looks good ;)

Anyway, I'm still looking


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PostPosted: Thu Nov 14, 2024 2:40 pm 
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Joined: Fri Aug 30, 2002 9:02 pm
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Location: Sacramento, CA
I believe the 65816 Test suite did test a few invalid BCD adds and the simulator passed all of its test. That being said, it did not test every case.

I do have a 65816 that I can test this example with... but it won't be until this weekend. If the simulator does not match the real processor, I'll do some more investigation. it would not be too hard to do a full range of ADC's and record the results and do a compare between the two platforms.

Daryl

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PostPosted: Thu Nov 14, 2024 5:29 pm 
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I tested gregorio’s code on POC V1.3 and got $11 as a result.  The same code in the Kowalski simulator (version 1.4.0.6) resulted in $21.

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PostPosted: Sat Nov 16, 2024 6:39 pm 
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I ran a full sweep of BCD ADC's from $00 to $FF with and without Carry set on the Simulator and my SBC-4. I do see some mismatches, mostly with flags but also many with $10 differences on the results. I will be working on the analysis and making repairs as I have time.

For those interested, here are the two files.

Format is AABBFFCCFF where AA+BB=CC and FF is the status register pre and post ADC command.

thanks!
Daryl


Attachments:
SIM.txt [1.5 MiB]
Downloaded 2 times
SBC-4.txt [1.5 MiB]
Downloaded 4 times

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PostPosted: Sun Nov 17, 2024 6:36 pm 
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Thanks for these two files, I noticed some interesting V flag settings in them. For example:
F880B8D8F9
F881B8D9F9
F882B8E0B9

I would like to understand how the V flag works in the 6502. Is there a way to do the same for a binary ADC?
It would be very helpful in interpretation.
Thanks.


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PostPosted: Sun Nov 17, 2024 7:56 pm 
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More BCD info: http://6502.org/tutorials/decimal_mode.html
More V info: http://6502.org/tutorials/vflag.html


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PostPosted: Mon Nov 18, 2024 6:14 pm 
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Full range of BCD ADCs from $00 to $FF with and without Carry set files were very helpful. I found the bug and now have 100% match of all CPU flags.
I am starting to test SBC for BCD. :wink:


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