Hi All,

I have to say that I was starting to like the EAGLE layout editor until I discovered that there is no easy way to export to a bitmap. Douglas Beattie confirmed this. Supposedly they are working on this for the next release.

I tried to do a screen capture but it turned out to be a mess because the schematic takes up several screens. I used Rich's suggestion and printed the schematic into PDF and I've attached the resulting PDF file. I am going to try and get it reformatted into multiple pages so it prints/PDFs correctly, as it stands it is cut off into multiple pages and difficult to read. It's a start though. You might want to print it and hold the pages together.

The attached schematic is incomplete, and lacks some gates and discrete components, but most of the major components are there. Please check it out and send your comments, corrections, and suggestions. Remember this is a work in progress, "pre-Alpha".

I'll try to make the next one formatted for easier viewing.

_________________
- Mike Naberezny (mike@naberezny.com) http://6502.org

Some feedback on the schematic so far:

IC6 (the data bus buffer) will drive the D[] bus on *any* read cycle, so it will conflict with any other device that is trying to drive the bus. Solutions:
1) Put *all* peripherals on BD[], so that D[] is only seen by the 6502 and the LS245. And, for those of us who don't want buffering, the LS245 can be replaced by 8 jumper wires.
2) Add extra logic to enable the LS245 only at the correct times. This would mean that the LS245 is *required* at all times.
I'd go with option 1).

U3 pin 5 connects to DECOD*. It will work fine, but it doesn't appear to buy anything. I think pin 5 could just go to GND, and save a trace.

Need pullups on the MCS[] lines, and a pull-down for DECOD*.

How about combining JP4,6,12,13,14,15, and 16 into a single block, and include all the MCS[] and ICS[] signals in that same block? Choose the pins such that the RAM CS is adjacent to MCS0 on one side, and VCC on another side. Do the same with the ROM select, 6522 selects, etc. So, most folks will use the 'standard' configuration by plugging in one jumper for each device (RAM, ROM, 6522, etc.). A non-standard memory map is achieved by jumpering wires between the correct pins (since the pins wouldn't always be adjacent).
Having (for example) both JP13 and JP16 doesn't appear to buy anything.

Are JP2 and JP9 necessary? Is there any harm in having A14 connected all the time? Or, is it so that there is flexibility to use a smaller device with a different pinout (maybe so) ?

Pete

Just some general ramblings,

Your idea seems very reasonable for a first effort.
Have you seen Grant Searle's UK101 replicomp
project off the www.6502.org website? It's very
close to what you're talking about doing, and would get
you going with a real OS and I/O and known good software
for a simple machine.It even gives you a working BASIC
if you want to prototype up a program much more quickly

(unless you're *really* *really* good in 6502 assembly!)

But to do anything "useful", you need more I/O, a time-of-day
clock (software or hardware), and some non-volatile writable
storage, so you want to plan your memory map out such that
there's room for the these and I/O when you decide to expand.

It's tempting to decode incompletely, but that can bite you
later if taken too far (e.g., only looking at A15 for 32K RAM
and 32K ROM. Where's the I/O then?)

I'm playing with EPLDs now and have learned how to create
efficient (As little as 128 bytes per chip select!)

memory decoders in a single 20 pin device, and it

occurs to me you could use FLASH instead of EPROM for your
program space, and use the PLD to "lock" certain areas of

memory from receiving a write (now from PLD out, not 6502)

signal. This is where you'd put
your "download monitor", so no program error can wipe it, and
then the whole rest of the 32K of space is user-writable
as a kind of on-line disk drive. Cool improvement.

With a few I/O pins & PLD, you could even "bank" the EEPROM
past 64K to provide substantial data storage area for data

logging or simulations of expert system behavior.

6502 whole-house energy controller (heat, A/C, lights,

presence detection, etc.) using history & fuzzy logic, anyone?
"Input cost of electricity in Kilowatt-hours"?
Then your controller can figure out when to apply
your very own personal "rolling blackout" to your house,
when your energy bill gets too high.
{ Those of you in California know what I'm talking about... }

-- Ross

_________________
The economy isn't "Grapes of Wrath", but it is getting
to be "Raisins of Regret."

-- Ross

Virtually all the discussion about making this board was before I came to the forum. Without knowing exactly what happened to the project, I get the idea that preliminary lay-outs were done, but that for reasons possibly beyond the control of those working on it, the board has not materialized even though the expected time frame has apparently passed. Hopefully progress is just slow, not stopped.

I've done dozens of dense board lay-outs from 1 to 12 layers, and gotten them into production, but for years I've had a pipe dream of making a small computer like this for schools, hobbyists, and even small industrial applications. I read through the 120 or so PC board project messages on this forum last week to compile a wish list of what everyone seemed to want. While a single board can accomodate much of the wish list, a few of the wishes conflict with each other, so not everyone will get exactly what they envisioned in the one board.

I'm still wondering about a few things.

1. "Small size" is one of the wishes. Getting all the connections made in a small size requires a multi-layer board, which is always more expensive. Amortizing the tool-up cost over a small quantity of bare boards can easily mean $50 each. Surface-mount technology (SMT) would even allow a stamp-type DIP, but would have to be pre-assembled for many of the hobbyists here. Without going to SMT, DIPs can actually be put on both sides of the board with their pin rows staggered. This way it can still be assembled by hand with a regular pencil-type soldering iron, but makes for a package that's small enough to fit into more applications, whether model aircraft, rockets, or whatever. If you want to operate the computer near a radio receiver, the multi-layer board with power and ground planes is imperative. New Micros has a lot of 68xx and Z80 boards for $100 and $200. Are these prices ok for an assembled computer? What response does "stamp computer" and "SMT" produce?

2. To some, bringing the bus out to a multi-pin connector was very important. It used to be to me too, but surprisingly, in eight years of regularly using my 65c02 workbench computer for both work and hobby, I've never had a need for that. My next one will run too fast for this anyway, so I'm refining some ideas for both serial and parallel expansion buses. There are thousands of peripherals available today with IIC, SPI, and Microwire serial interfaces. My parallel Xbus will be for things like large, slow memory arrays, the battery-backed real-time clock with access times in the microseconds, etc.. The Xbuses accomodate things like the LCD, printer ports, RS-232, -422, and -485 ports, infrared port, RTC, large flash storage, and so on, while keeping a very small, streamlined CPU consisting of the just uP and the few things that absolutely must be attached directly to it. Does the idea sound attractive?

Judging from past posts, some will undoubtedly feel that "we've talked about this enough now-- we just need to do it." I understand. At some point a plan needs to be more-or-less frozen and carried out. I hope there's always room to talk about the next one though. Even if no production PC board ever materialized, the continuing exchange of ideas still helps us advance our own personal 6502 projects. I think it's valuable any way you look at it.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Hi All,

If you are interested in seeing the "Design Project" developed and distributed then please send me an e-mail at mike@mikenaberezny.com even if you have expressed interest in the past. I need to know how many people are interested and who can help. Due to lack of time and resources on my part I can't design and build it by myself but I am willing to support the effort as much as I can to see it become a reality.

Best Regards,
Mike

_________________
- Mike Naberezny (mike@naberezny.com) http://6502.org

[Posted to Delphi and to Mike]

Hello Mike!

MN> If you are interested in seeing the "Design Project" developed and distributed then please send me an e-mail at mike@mikenaberezny.com

I'm still interested!

MN> Due to lack of time and resources on my part I can't design and build it by myself but I am willing to support the effort as much as I can to see it become a reality.

It's good to hear you're still keen, and I understandentirely about lack of time and resources. I'll review the messages on delphi again, but would welcome a summary of what is done and decided, and what is left to do.

Regards,

- Andy Ball.

> I'll review the messages on delphi again, but would
> welcome a summary of what is done and decided,

Andy,

I joined the forum after most of the hashing-out of what should be on this board. In Feb I read through the 100+ postings on this project, and compiled the following comments and wish list from the members' posts. Just a few are incompatible with others; ie, you can't have both A and B in the same computer, but most of it could be acomodated in the same product. These are not in any particular order.

1. Up to 4MHz, intended to be simple for those who "are in it to learn and have fun"

2. battery-backed SRAM

3. access to bus to connect more stuff to

4. soft grounding of a 74HC138 EN\ line so the whole I/O decoding scheme could be turned off by an expansion board plugged in

5. 65c134 board for robotics (a separate product)

6. small size, low power

7. 32 I/O lines, hardware debugging

8. 1 or 2 com ports, and it might be ok if it only supported 9600,8,N,1 (I don't see this as a hardware limitation though)

9. later add on: keypad, small LCD, storage

10. room for ZIF socket around EPROM area

11. reset button

12. If a clock oscillator can is used, it should be a low-power type. Some are power hogs.

13. stackable boards

14. more RAM than ROM, like 32K/16K (hobbyists here generally don't have large established operating systems or programming environments they want resident in ROM)

15. no video

16. 50 or 60 Hz reference was mentioned, but I believe the same timing need can be taken care of more elegantly using software-programmable timers in the I/O ICs.

17. no programmable logic

18. Some wanted an I/O address block split into several enable lines from something like a '138; but actually ICs with both CS and CS\ (like the 65c22 and 65c51) can get around this requirement, allowing as many as ten of them in a 16K address space with only a quad NAND 74HC00 to do the whole thing. I did it this way on the workbench computer I've been using regularly for years.

The questions I'm left with are:
A. How much is this computer worth to the members? PC boards aren't cheap in small quantities. I've laid out a lot of dense boards of 1 to 12 layers and walked them through to production; but never having dealt with PC-board manufacturers for small hobby quantities, I can only guess that the bare board will cost at least $30-40 each before any parts are put on. A good multi-layer board will be much more, but some here may say it's definitely worth it.

B. How high is the priority for small size? I expect, but maybe should not asume, that most members would not want SMT, even if the parts were installed for them. Expensive equipment is not necessary, but the lack of it may make the job take slightly longer.

C. Sometimes a problem on an internal layer of a multi-layer board won't show up until after the board has gone through soldering. In the even that there are any such defects, we want to be sure that the forum members' cost is set such that neither Mike nor anyone else is left holding the bill. I wouldn't expect much warranty replacement cooperation from a board house on a tiny, one-time order, especially if we don't pay them the $400 NRE (a one-time cost) to set up the automated bare-board test. If we limit ourselves to double-sided board, this paragraph may be irrelevant.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Hello Garth!

GW> 1. Up to 4MHz intended to be simple for those who "are in it to learn and have fun"

I mostly fall into that category, and would be quite happywith 1MHz.

GW> 2. battery-backed SRAM

I could definitely use this, hopefully the circuitry required would not be too involved.

GW> 3. access to bus to connect more stuff to

This definitely gets my vote, and is one of the main reasonsI would look for a single board microcomputer rather than asingle chip microcontroller. It needn't be anything extravagant though.

GW> 4. soft grounding of a 74HC138 EN\ line so the whole I/O decoding scheme could be turned off by an expansion board plugged in

An interesting touch.

GW> 6. small size, low power

Admirable aims ;o)

GW> 7. 32 I/O lines, hardware debugging

Those I/O lines may reduce the need for an expansion bus, at least up to a point.

GW> 8. 1 or 2 com ports, and it might be ok if it only supported 9600,8,N,1 (I don't see this as a hardware limitation though)

Hmm... 1 would be nice for a console, 2 would enable real-world application as a protocol converter. 9,600 BpS isprobably adequate for my purposes.

GW> 9. later add on: keypad, small LCD, storage

Potentially useful things, not sure that they should be on the main board though.

GW> 10. room for ZIF socket around EPROM area

Another nice touch.

GW> 11. reset button

Definitely gets my vote!

GW> 14. more RAM than ROM, like 32K/16K (hobbyists here generally don't have large established operating systems or programming environments they want resident in ROM)

That's interesting. I know microcontrollers generally have more ROM than RAM. I guess it depends whether yourapplication is more code/constant or (variable) dataintensive. I've been working this morning on a 6504 designand thought about 2Kb EPROM / EEPROM and 1Kb SRAM. In partthis was because 2708 EPROMs are impractical. I'm now leaning more towards 'half and half', with a few addresses 'stolen' from ROM for I/O ports.

GW> 15. no video

Agreed.

GW> 16. 50 or 60 Hz reference was mentioned, but I believe the same timing need can be taken care of more elegantly using software-programmable timers in the I/O ICs.

I really like the idea of a 50/60 Hz reference. It could make life easier for the timers!

GW> 17. no programmable logic

Agreed.

GW> 18. Some wanted an I/O address block split into several enable lines from something like a '138; but actually ICs with both CS and CS\ (like the 65c22 and 65c51) can get around this requirement...

That's a good point, but it's worth remembering that people here may want to recycle chips from old equipment. I'm not sure if the straight NMOS 6522 etc. feature those selects.

GW> A. How much is this computer worth to the members?

I can only guess that the bare board will cost at least $30-40 each before any parts are put on. I would obviously hope for less than that, but would still consider it at those prices.

GW> B. How high is the priority for small size?

I imagine it would depend on the application. Personally Icould live with an A4 size board (~8.25x11.5 inches), especially if that meant a double-sided PCB would suffice. Of course, that's a bit large for some projects, and maycost more than a smaller multi-layer board. If it could bedone on a 3U Eurocard, I'd be very happy )

GW> I expect, but maybe should not asume, that most members would not want SMT

I would prefer PTH, it's easier to service in the field, and generally more accessible to the hobbyist.

Regards,

- Andy.

Hi All,

After putting out my query I have received a total of five or six replies, two of them stating a lack of interest. This is not a sufficient number from a purchasing standpoint and also there is not enough people to support its development. Although I still think the board is a good idea and I would like to eventually see it become a reality, at this point I think it should be postponed indefinitely.

While I have taken the standpoint not to lead this project through myself at this point, it does not mean that one of you cannot pick up and start developing it. If someone does decide to see it through the design of a printed circuit board, I would be willing to use 6502.org to support it and try to get together orders for it. It's just that with so few people interested now and my time being very limited lately I cannot justify doing it all myself.

Regards,
Mike

_________________
- Mike Naberezny (mike@naberezny.com) http://6502.org

Hello

I'm joining this discussion late but would like to express interest in the project.

I've read the design goals and like most of them.

I just finished designing and building a small SBC with a 65C02, 32k EEPROM, 32k static RAM, and a 6526 CIA. My board size was limited and I was not able to add serial IO, although I did write a terminal emulator that allows comm through 4 wires in a PC parallel port.

The good news is that I had expresspcb.com make three boards for only $59 ($20 each). Size is limited to 2.5" x 3.8"

Check out the details on my web page:

Daryl

_________________
Please visit my website -> https://sbc.rictor.org/

I trying to integrate 8251 into 6502 based system, but not working.I hope you can give me an idea or schematic view and simple test program to test 8251 in system based on 6502.

I got your message. I felt this project would get more attention if it was placed in the "General Discussions" group. So I copied your request and gave it a new title "6502 - 8251".

I'll see waht I can do!

Daryl (65c02@altavista.com)

_________________
Please visit my website -> https://sbc.rictor.org/