You can purchase a core version from the WDC people who don't seem to want to sell the packaged devices, preferring instead that you buy their core license.
There is a free (public-domain/open source) 650x core listed as free-6502. A pointer to that can be found at
www.6502.org.
Making your own device via FPGA/CPLD tools and a published IP core is probably a good place to start. However, it's not a bad idea to rework the innards of the core to suit your own idea of how the thing should work. In order to understand the workings of the core, particualarly with respect to its use of the ALU, I recommend writing a detailed simulator of the original part (MOS-Technology) pursuant to its cycle-by-cycle characterization of the device's external signals throughout each instruction cycle type. This is best done in a high level language like C++. Then, since there are a few VHDL compilers out there that take C++ input, you will have minimal trouble getting from the knowledge and understanding of the core's internal operations to a physical implementation.
My interpretation of the core operation involves use of the ALU twice per clock cycle: once to perform the normally thought-of ALU operations on data operands, and once to operate on the PC, SP, index registers, and status. I'm also leaning toward a 4-bit ALU used twice, though that doesn't seem to be yielding the savings in hardware resources that I originally believed it would. I'm attempting to implement this in a relatively large CPLD rather than an FPGA.
I'd encourage you to make a fairly throrough investigation of the device types offered by XILINX, ALTERA, and ATMEL, though there are several others equally worthy of your attention. I find the CYPRESS CPLD's very tempting, but their software is not free as that from ALTERA, ATMEL, and CYPRESS is. Lattice also has free software that deserves a look. I'd recommend you start with the XILINX devices, in that case with the focus on their 9500 CPLD's and their SPARTAN series of FPGA's. (Each of those is found at
www.<company_name>.com, with the exception that Lattice is latticesemi.com.)
For now, the XILINX stuff has to be run via the www, i.e. you install the interface software on your computer and then run the software over the web. That ensures you use only the latest and "greatest" of their software. It's really slick if you have a cable modem or DSL connection, or faster, but it's tolerable if your analog connection is at 40 kb or better.
The most comfortable way to get the Lattice, ALTERA, and ATMEL stuff is to email them at the literature request address on their website and have the software sent to you on CD. Be sure to get the device data CD from them as well, since you'll need to know the characteristics and capabilities of each device. Once you've learned to use the tools, you'll find that you can make use of published functions such as UARTS, etc, available on their sites, along with other hand features like their devices' in-situ-programming hardware and software. These devices are, for the most part reprogrammable and many are programmable from a JTAG port made from your printer port and a cable you have to build yourself. They often require some simple external circuitry to buffer the port, but that's published on their site as well.
I bought the Cypress device development kit which includes their VHDL compiler along with a programming cable and an evaluation board with one of their devices on board. I had to build a manual crosspoint switch to allow me to reconfigure the pinout without building a separate cable for each vendor, but that's not a big problem either.
be sure you read all about their programming algorithms and I/O voltages. It's easy to get confused between device families that have different I/O voltage levels.
regards,
Uli