After a period of abstinence, I’d like to make a new start. In the mean time I’ve got back my first computer, the TI-99/4A. http://en.wikipedia.org/wiki/Texas_Instruments_TI-99/4A Back in the early 80’s, I only had the bare console, the Extended BASIC Cartridge, and the Program Recorder. I learned BASIC programming on it.

By coincidence, I could get a console, which had defective RAM, for a fraction of the ongoing eBay prices. (they are pretty expensive here in Europe) It’s in an adorable condition. In the 80’s, to use the system to its full potential you’d have to buy a Peripheral Expansion System. Now it’s possible to buy a small PCB which replaces the big and expensive PEB. http://webpages.charter.net/nanopeb/

Point of this story is, there is an extension, a replacement FPGA for the TMS9918A Video Display Processor, VDP. Of course it has a twist to the original TMS9918A, it has a standard 640 x 480 @ 60Hz VGA output. Aside from reproducing all the original functionality of the TMS9918A, the F18A has some nice extra features:

http://codehackcreate.com/archives/335

640×480@60 analog VGA output
A binary compatible TMS9900-based GPU
Horizontal and vertical scroll registers with page support
All 32 sprites can be displayed on the same scan line
Removed the VDP “speed limit”, so you can’t over run reading or writing to it
80-column mode
64 programmable 12-bit color registers, which means a 4096 color palette
30-row mode (32×24 tiles or 32×30 tiles (256×240 resolution))
A real bitmap layer with up to 4 colors per pixel (2-bit color)
Enhanced attributes for tiles and sprites
Each sprite can set its own 8×8 or 16×16 size independently
Sprites can be “linked”
1-bit, 2-bit, and 3-bit color modes for tiles and sprites
A “fixed” tile map that allows individual tiles to not be affected by scrolling
Two 32-bit 100MHz counters, one dedicated to the GPU, the other for the host CPU
Two 32-bit 100MHz Linear Feedback Shift Register (LFSR) random number generators
Programmable horizontal scan line interrupt

No, I have no interest in helping to sell them.
However, I’m planning to buy one for my TI-99/4A, and one for my upcoming computer, MARC-3. As I’m learning the TMS9900 assembly language, I’d like to program some “applications” for both systems.

While both claim to be 16-bit CPU’s, the TMS9900 and the W65C816S are *REALLY* different beasts! To name a few things:




Learning from the mistakes and experience of MARC-1 and MARC-2, I’d like MARC-3 to be a modular computer with a ground plane. Using 5V parts for the whole system. My motivation is pretty simple:
I want to have an experimental computer, making interfaces as I go. No doubt, the trade off will be speed, but I’m perfectly satisfied when it’s capable of running on 4 to 8MHz.

The basic system will consist of:



Additional interfaces / features will consist of:



Of course these are a lot of peripherals, but that’s the beauty of having a modular system, I can expand as I please. Although the XC95288XL is a 3.3V device, it’s 5V tolerant. I’d probably try with pull up resistors, but that’s for later. And of course the key features are in the basic system, which will be build first.

The memory map will be the same as MARC-2, except for the SID, I’ll probably decode the SID to 54272, $D400, that’s the memory location of the first SID register in the Commodore 64. This way I have access to “High Voltage SID Collection” without having to convert the tunes. Or I’ll make the base address selectable from $00BFxx to $00D400.

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Marco

This is the bus I'm going to use. I read about S-100, ISA and PCI busus, but this is the most convenient way to put the data and address lines for 65816.

Soon I'll start on building the ground plane, here is the layout.

For improved high-frequency performance, let me encourage you to distribute the ground and power pins better, so the ground return current for any given signal is much closer, resulting in less inductance as well as less unwanted coupling between signals. The goes even when there's a true ground plane. We talked about this before, I think in one of EE's topics, but I can't find it now. The sticky topic "Techniques for reliable high-speed digital circuits" should help. See how I distributed the grounds and bypassed power pins in my 4Mx8 10ns 5V SRAM module, in the data sheet at http://wilsonminesco.com/WM-1_4Mx8SRAMm ... -15-13.pdf . Every signal pin is within .200" of either a ground pin or a bypassed power pin which serves as an AC ground connection. In the early days of computer buses like STD and S-100, rise times were much longer so this wasn't critical. Today parts are much faster and their rise times much shorter.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Thanks for the info Garth.

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Marco