Awesome job!

XC2S200? for the T65 core?

You have a disassembler working, nice vid, shanks for sharing.

What does your memory map look like?

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

Hi

There is 65816 chip from WDC ( I will put my hands on t65 later on)

memory map (for now )

$0000 - $03fff ram
$0400- $07c0 - screen ram
$0800 - $0bc0 - color ram (8 bit per char)
fonts starts from (selected by register)
$2000 - $3000 - font ram (256 colors)


there is rs232 , ps2 for mouse and keyboard , hardware cursor (x,y pos. by registers) , background color , irq decoder , 24 bit timer . Cpu clock is selected by register (1,2,4,8,16 mhz) .

and now I'm working on the sound system (http://www.swinkels.tvtom.pl/swinsid/) , after that i planing to add
some multi color sprites and fonts .

Swinsid in action .

Big thanks to Swinkels for his help and time .

http://www.youtube.com/watch?v=tr_IXEFt-PY

sound quality is just fantastic , much better then on this video.

here is a sample .

http://rapidshare.com/files/415105931/swinsid.ogg.html (change ext. to ogg)

I downloaded it. swinsid does do an excellent job of replicating the 6581. I'd love to have 32 or more of those AVR's running in unison! Good luck with the sprites!...

Can the T65 core actually fit onto a XC2s100?

You must post your work on the T65 core, or any 6502/65816 core here.

You would have many readers!

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

Hi ,

I have two of them running on low pin atmega88 @ 32mhz .
New firmware improves the sound quality .

I had T65 core working (with some problems) on my board long time ago.
I'm not a vhdl guru or something , but that wasn't a big problem to make that core working. The xc2s100 will handle T65 fine.

Thanks

Hi few more words about swinsid chip , Swinsid is a greatest sound chip ever made for sbc's systems , almost 100% compatible with sid chip , and that give as possibility to use huge song library from the internet . I think most of as has a C64 background. There is only one problem with it .. maximum bus speed is around 1mhz. So , well , it's not fast enough , next step is to ask Swinkels to port that to some arm chip ( I don't know maybe lpc2103 will do ???) before I will do that i will have to know ... is' that make any sense to you?

I had found the swinsid link a few months back and had thoughts of adding an SPI-driven version to my SBC-3's supported I/O Devices.

Now that someone has confirmed that the devices are of good quality, I might have to research it a little more.

Daryl

SPI you saying , can you rebuild the firmware ? I don't think so
Let me know about you plans anyway.

greetings

I haven't researched too far in depth, but the 1MHz bus speed limit seems imposed by the software emulating a real 6502 bus device.

If you recode the interface to use some form of message passing, you can use the SPI interface to attain higher throughput, and communications with the device can even be asynchronous (meaning the host CPU can be off doing something else while commands to the swinsid are in transit; this requires deep buffers or DMA, though).

Alternatively, a simpler parallel port interface can be arranged and coupled to a VIA or similar parallel interface, I'm sure.

If none of these are options, you can create write buffers in an FPGA to translate high-speed writes to the swinsid to 1MHz writes for each device.

guys , swinsid is using interrupts on cs signal , so his responds are limited ,
limited by maximum speed the mcu can read the ports status.

Not sure if speeding up the chip would actually make sense - change the sound output so fast noone can hear any difference?

To use it with a faster CPU, you could slow down your CPU only while accessing the chip. The 6502's RDY pin is made exactly for that. Or buffering writes the the chip so that the CPU can continue while the actual write is still in progress (makes for an awfully complex bus interface, plus no reads or an even more complex bus interface)

André

wow. fachat thats the way my system works , I just slowing down cpu to 1MHZ bus , this not a solution . imagine when you system has interrupts made by video sysem working at 60hz . believe me , that's not good solution

This leaves talking to the SwinSID via a VIA chip or FPGA-resident write buffers.

kc5tja , don't think so , irq are the one thing and the speed you going to write to registers is a different story.

lest go to the original questions ? DO WE NEED CHIP LIKE THIS ?