Hi,
yes you are right to assume that Phi2 keeps on running even while
RDY is set low. The address and data lines, however, are not(!) made
high impedance.
The purpose of the RDY line is to keep the CPU waiting for slow
memory or I/O. So the address lines (and data lines in case of write)
keep their valid state.
I have a schematics in the works where a second CPU takes over the
bus from the main CPU, holding the main CPU via RDY, and I have
to decouple the CPU lines with '245 drivers.
Oh, sorry, I see that you are using a variant with a BE line - I assume
that would be possible too instead of the '245, but I have no
experience with it (still only using what's available to me - R65C02 -
that do not have this line).
BTW: anyone know a good source for WDC chips in Germany?
André
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