Mickey Mouse logic, address decoding, power management, etc.

[No True Scotsman]

Is this advisable? Or is it a case of "not that you would - but you could?"

Whilst I was playing around with decoder circuit designs, I came up with one design that used a single OR gate from a 74HC32, wasting the other 3 gates. The specifics of the circuit are unimportant, as this could apply to any number of designs.

I mused that the inverters, NAND gates, and the single OR gate in the circuit could all be implemented with a couple of 74HC14s and some 1N914 diodes, through the magic of "Mickey Mouse logic."

Various logic gates implemented with Mickey Mouse logic

mickey_mouse_logic.gif (10.34 KiB) Viewed 1166 times

It probably wouldn't save board space, as you'd be substituting the footprints of all those diodes for those of the NAND and OR chips; but it would be a bit cheaper, and it'd be something one could bang together if one had only 74HC14s on hand.

Question is: would MML be fast enough and reliable enough for a decoding application?

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NOTE: This thread started out as a discussion of diode logic gates, and... drifted. Many aspects of a proposed portable computer and its supporting ecosystem are explored herein.

Discussion of address decoding for the TLC7528 dual DAC starts here, and runs concurrently with the original topic.

Here begins a brief side discussion about the appropriate use of P-channel and N-channel FETs as current drivers, which morphs into a more general discussion of power management. Options considered include the WAI instruction and stopping the clock.

Much of the rest of the thread is filled with ideas and musings about a portable computer in the vein of the TRS-80 Model 100.

[BigEd]

Seymour Cray used diode logic!
> The CRAY-3 logic packages do not use emitter coupled logic (ECL). Neither do they use transistor gates of the type used in high-speed, silicon circuits. The circuits used in the CRAY-3 logic packages involve a level of diode logic followed by either two or three levels of inverting amplifiers. This is referred to as Schottky-Diode FET Logic or SDFL.

[barnacle]

But remember the time constant as the diode junction capacitance charges. It's one of the things that is hindering my diode ROM board....

Neil

[GARTHWILSON]

Yep; expanding on what barnacle said, if the inverter had even 5pF of input capacitance, that times your 100K resistor makes for a 500ns time constant, basically meaning that'll be your propagation delay—and that's not counting capacitance in the other diodes.  The stuff about pulses and oscillators is discussed in the 6502 primer.

[BigDumbDinosaur]

No True Scotsman wrote:

Is this advisable?  Or is it a case of "not that you would - but you could?"

As Ed noted, it can be made to work, and with considerable alacrity.  However, as you have it, charging/discharging parasitic capacitance through those 100K resistors is going to severely limit switching speeds.

[BigEd]

I've seen two-diode gates supporting 2MHz operation in a Beeb add-on. I'm sure it depends on the diodes. Oh, in fact there's a two-diode gate on the main board: two 1N4148 and a 3K3 resistor.

[BigDumbDinosaur]

BigEd wrote:

I've seen two-diode gates supporting 2MHz operation in a Beeb add-on. I'm sure it depends on the diodes. Oh, in fact there's a two-diode gate on the main board: two 1N4148 and a 3K3 resistor.

The 1N4148 is a good choice for that sort of thing...low capacitance and reverse recovery at around 5ns.

[Dr Jefyll]

No True Scotsman wrote:

the magic of "Mickey Mouse logic."

Yup -- I love it! Many's the time I've used Mickey Mouse Logic to wriggle out of an awkward situation. Reduced chip count and just plain laziness are part of what motivates me, but there's also a certain sneaky feeling of "getting away with something" ...not to mention the practical economy of being quick 'n dirty when the situation simply doesn't require anything fancier. But the scope has been limited. All my tricks so far have been for low-speed stuff, like glue logic for a 1 MHz CPU, or discrete-logic projects built entirely out of molasses-paced 4000-Series CMOS gates.

Nevertheless, I believe diode logic does in rare cases have hobbyist potential for high-speed jobs like address decoding... but it needs to be feasible to get rid of the speed limiting pullup/pulldown resistor and instead arrange to have the node in question actively pre-charged high or low on one phase of a suitable clock signal and then allow the diodes to exert their influence on the other phase. This isn't a trick you'd bother with for a simple, 2- or 3-input gate. But it's something I might consider if the application requires a 15- or 20-input gate, for example.

BTW, No True Scotsman, I was charmed by the oscillators and pulse-shapers you included in you diagram. In the same spirit, perhaps you'll enjoy a marvelous little pushbutton circuit I stumbled across decades ago, which does its own debouncing and provides a push-on, push off function using just a simple SPST pushbutton! The circuit appears in this post, and the explanation appears 4 or 5 posts later.

-- Jeff

[drogon]

No True Scotsman wrote:

Question is: would MML be fast enough and reliable enough for a decoding application?

The Gigatron: https://gigatron.io/ has a diode AND gate in it - it runs at bout 8Mhz IIRC, but it's been while since I studied it (I have one), so not sure what speed it's exposed to.

-Gordon

[No True Scotsman]

Dr Jefyll wrote:

No True Scotsman wrote:

the magic of "Mickey Mouse logic."

Yup -- I love it! Many's the time I've used Mickey Mouse Logic to wriggle out of an awkward situation. Reduced chip count and just plain laziness are part of what motivates me, but there's also a certain sneaky feeling of "getting away with something"

I know what you mean. When I came up with the idea, I imagined that I'd get a chuckle out of someone examining the circuit and wondering what's going on with all of those diodes.

Dr Jefyll wrote:

BTW, No True Scotsman, I was charmed by the oscillators and pulse-shapers you included in you diagram. In the same spirit, perhaps you'll enjoy a marvelous little pushbutton circuit I stumbled across decades ago, which does its own debouncing and provides a push-on, push off function using just a simple SPST pushbutton! The circuit appears in this post, and the explanation appears 4 or 5 posts later.

The MML chart isn't mine. I found it on a DIY electronic music website some years ago.

It so happens that I've been shopping for a good push on / push off power button. I'll file that one away for later. Thanks!

The consensus appears to be that propagation delay would kill the whole enterprise unless you knew what you were doing. Well, that wouldn't be me.

[No True Scotsman]

In the case of the system I'm building, the OR gate in question is needed to separately address the two DACs of the TLC7528. As near as I can tell, there's no such 7400 series OR chip with inverted inputs like this, so it'll have to be implemented with a 74HC32 and a 74HC04.

Before we get too far off into the weeds though, let me backtrack a bit and show you the main address decoder that this section will build upon. I chose this 74HC688 decoder posted by Michael, partly because it divides the address space up about the way I want it, but more importantly because it breaks the control signals out in a way that I can wrap my head around.

That's where I'm starting, and I don't want to add too many more gates between there and the TLC7528.

As it turns out, the imaginary OR gate with inverted inputs isn't needed. The decoder I want for the dual DACs can be made with a normal OR gate, a NAND, and an inverter.

Unless I'm mistaken, this puts DACA at $8020 and DACB at $8040, no?

[barnacle]

No True Scotsman wrote:

As near as I can tell, there's no such 7400 series OR chip with inverted inputs like this

de Morgan's theorem[*] is your friend... assuming I have correctly read your requirement for a gate which produces a low output when either of its inputs is low...

Code: Select all

OR
a  b  x
0  0  0
0  1  1
1  0  1
1  1  1

NOR
0  0  1
0  1  0
1  0  0
1  1  0

AND
0  0  0
0  1  0
1  0  0
1  1  1

NAND
0  0  1
0  1  1
1  0  1
1  1  0

NOR, inverted inputs
0  0  1
0  1  1
1  0  1
1  1  0

NOR, inverted inputs and output
0  0  0
0  1  0
1  0  0
1  1  1

Neil

[*] invert the inputs and outputs and change the function from AND to OR, or from OR to AND

[No True Scotsman]

barnacle wrote:

assuming I have correctly read your requirement for a gate which produces a low output when either of its inputs is low...

The connection suggested by the datasheet requires such a device. I found that the last circuit in my post gets the job done with a normal OR gate.

[Michael]

Could you drive the DACA/DACB input with the A0 address line?

[No True Scotsman]

I'm using A4 on the /CE input of an SCC2692 dual UART. That circuit is the same as the top circuit in your figure, with A0 - A3 addressing the UART's registers at $8010 - $801F. I I like how you have DACA and DACB at consecutive addresses. I just need them to start at $8020 or higher. I think A0 and A5 will get me there with the same circuit and the 688 decoder. Thanks!