> am I correct in thinking these proms would work with one of
> WDCs 14MHz chips?
No. Remember that the 6502 does a complete read or write in half a clock. In fact, the Apple II did two memory accesses per clock: one for the processor and one for the video, so they could both access the same memory, seemingly at the same time, at full speed. One clock at 14MHz is about 70ns, so half is about 35. Your EPROMs would take more than that before even considering the access time of the memory and other parts. Granted, the address and R/W do become valid before phase 2 goes up, but you need to gate the RAM with phase 2, not just the address. With quick glue logic, RAM speed with a 14MHz 6502 should be no slower than 25ns, and probably faster. The 14MHz ones will operate a lot faster however, if the parts connected to it are fast enough.
Those new to the microprocessor sport tend to make address decoding much more complex than it needs to be. This leads to lots of extra parts (and build time) and long propagation delays. As a contrast, the address decoding at
http://www.6502.org/users/garth/project ... chematic=2 can be done with nothing more than a quad NAND gate (74xx04) and supports 32K of ROM and 16K of RAM, and up to ten I/O ICs (like 6522's and 6551's). With a small change, you could have 32K of RAM and 16K of ROM, and still allow for more I/O than you could want.