I have made my project exactly like krallja in this video: https://youtu.be/QYom_OBcBCY and followed along until I completed it in his following video: https://youtu.be/0QleiL-WdyM. I think it may be a failing tms9918anl since I have tried every series and parallel 10.738635 crystal resonator from mouser with similar results. The problem occurs when it is supposed to change the background color as shown in the below code and it looses the connection and the crt tv doesnt recognize the signal:
lda #$0B ;data write to $4001
sta VDP_REG ;vdp_reg is address $4001
nop
nop
lda #$87 ;then store to register 7 for background
sta VDP_REG
I then measured the voltage that is supposed to be degraded to ~2volts, but it is more like 2.5v, I then tried pulling it lower with a resistor but nothing changed. When I leave the write pin that is connecting from the vdp to the output of the decoder/demultiplexer chip floating and then connect it back sometimes (if im lucky) it is able to get that color value and successfully output it to the screen and the tv accepting it. The decoder/demultiplexer is the same that is used in krallja's videos.

Ive been banging my head around trying to figure out why this is happening for the past 2 weeks and if anyone could possibly help give some clues as to why this is the case I would be more than grateful.

Welcome!

I take it the 6502 side is working and you can drive the LCD display OK?

And your TV signal is stable and black before the VDP write? So we can say the VDP is outputting a good video signal?

When you say
"tried every series and parallel 10.738635 crystal resonator"
that is a little worrying - it's usual to use a clock can (crystal oscillator) not a bare crystal - I see such a flat metal rectangular four-pin device at the bottom left of the original breadboard. Is that the one you're talking about?

Another thing to be very careful about is the logic family of 74 series chips: there are several families, with different timings and characteristics, and if you're trying to build a copy of something, you should be sure to select the same family. Check the letters after the 74.

If you could attach a photo of your build that would be a big help.

Welcome, Redragon_Gamer.

As Ed says, it would be a big help if you could attach a photo of your build. (On this forum, photos can be attached to your posts.) And here's another tip. For better readability, you can monospace your code using one of the the formatting buttons. Like this:

This sounds to me like a comparatively subtle problem. What I mean is, if there were a more fundamental problem (such as trouble with the crystal) then the unit would be badly crippled and you wouldn't even get this far. (Ed's questions also reflect this. So, please confirm: are things OK on the 6502 side and with the LCD display?)

Offhand, my first thought is to wonder if the sta VDP_REG instruction in the sequence above might, due to a flaky connection or an outright construction error, be writing to some other register than the one that's intended. So, it does produce an effect... but not the effect that's intended!

That's only one possible theory, but it's fairly plausible and it gives us somewhere to start. The selection of the correct register is determined by the CPU address lines that attach to the tms9918anl. So, I would start by checking those connections. (But do remember to answer the questions and supply us with photos, please!)

-- Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Have you remembered to reverse the data bus?

TI documents of the era consider D0 to be most significant. Which is the opposite of how the 6502 etc define things.

Meaning CPU D0 goes to VDP CD7 on pin 17, etc round to D7 connecting to CD0 on pin 24.

Here is an image of the board so far (ill probably get it all soldered when this issue is resolved)



Btw im using an sn74hct138N for memory decoding wired as so to the 65C02:

Enable pins:
G1 -- A14
G2AB (low-enable) -- A15
G2BB (low-enable) -- A13

Decoding pins:
A -- RW pin on 6502
B -- gnd
C -- delayed signal from WR pin (same as from Ben Eater's RW signal delay through nand gate for interfacing to ram chip.

Output pins are Y0 and Y1 which go to the tms9918a's write and read pins 14 and 15.

I am almost done with the basic wiring schematics for this build, and the everything else seems to be working while outputting patterns to the 6522 output
Thx for your input

[quote="Martin A"]Have you remembered to reverse the data bus?

ya its reversed d0-cd7 etc

[quote="BigEd"]it's usual to use a clock can (crystal oscillator) not a bare crystal - I see such a flat metal rectangular four-pin device at the bottom left of the original breadboard. Is that the one you're talking about?

That is the crystal oscillator at 1 mhz to drive the 6502, ram and 6522. The parallel crystal resonator that's clocked at 10.73863 has a load capacitance of 32pF. Heres the Mouser part number: 774-MP107-E. Its directly connected to the tms9918a's last 2 pins

a Schematic would be very helpful, even when doing something on breadboards it's always better to first draw out an actual schematic in software like KiCad, easyEDA, etc. beforehand.
makes it easier to notice any wiring mistakes as you then have something to compare the breadboard against. plus in this case it would make it easier to share your circuit. (most CAD software allow exporting to monochrome PDFs which you can then directly upload and inline into your post for everyone to see)

on another note, you seem to be accidentally removing the [/quote] part of quote blocks when replying, this breaks them so the quote is no longer in it's own highlighted block.

Hello again, I finally finished the schematics but the image of the base computer is a bit blurry although still somewhat legible (I will never use smartdraw app to do this again since I had to export it as an image or pay):



Im beginning to wonder if my 74hct138N isn't exactly the ideal route since it has a different voltage threshold and timing may be different than the 74ls138. I cant think of anything else im doing wrong though but ill probably try getting the ls version.

I dont know if this helps much, but I just realized that if I run the 6502/ram/rom clock slow enough then ~1/5 trys of restarting the 6502, then im able to successfully change the background with the code below. If its not successful when changing the color then it shows a garbled video and tv doesnt recognize it as an ntsc signal:






It seems to only show white/a purplish color with red horizontal streaks/ light blue/ purple/ yellow/ light blue (again)/yellow/ light blue/red/ and then it loops again

I finally figured it out- other than all the other chips on the board the tms9918a used quite a bit of power and thus needed a more direct way of obtaining it then being hooked on multiple power lines above and below it. After adding a ground and power jumper to make it more directly attached to a non-fluctuating power source it is now working properly. Thank you all for trying to help me when this was something I should have tried long ago

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Thanks, I will likely learn about how to design and create this on a motherboard while keeping this in mind, Ill let yall know how this turns out!

The chip is more stable ever since i tryed 33pf load caps on the crystal