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Michael
PostPosted: Tue Jan 09, 2024 12:33 pm 
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Joined: Wed Feb 13, 2013 1:38 pm
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Location: Michigan, USA
Could a 74HC151 be used as an address decoder in the (RAM only) circuit below? I don't have a '151 at the moment to test.

Attachment:
xUART65 A1 ram (3).png
xUART65 A1 ram (3).png [ 180.58 KiB | Viewed 189925 times ]

I also wonder if a 74HC151 could be configured to allow inserting 4K I/O blocks into either the upper or the lower 32K address space?

TIA, guys. Cheerful regards.

Attachment:
74HC151 Decoder.png
74HC151 Decoder.png [ 80.31 KiB | Viewed 189925 times ]


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74HC151 Datasheet (TI).pdf [476.87 KiB]
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BigDumbDinosaur
PostPosted: Tue Jan 09, 2024 3:48 pm 
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Man, that thing is as slow as molasses in January in the Arctic.

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plasmo
PostPosted: Tue Jan 09, 2024 5:28 pm 
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Well, CMOS runs really fast January in Arctic, so it'll just congeal in the hot New Mexico sun in July. :lol:
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BigDumbDinosaur
PostPosted: Tue Jan 09, 2024 7:37 pm 
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The 74HC161 is a good candidate for synthesis in a GAL.  7-10ns versus 50ns.

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