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PostPosted: Wed Jun 01, 2022 2:23 pm 
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As these got a mention in another thread, I thought it might be worth surfacing them:

EEVblog #859 - Bypass Capacitor Tutorial (33mins)

EEVblog #1081 - Are Bypass Capacitors REALLY needed? (35 mins)

EEVblog #1085 - Bypass Capacitors Visualised! (34 mins)

Thanks to drogon and tmr4 for linking them!


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PostPosted: Wed Jun 01, 2022 6:06 pm 
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Interesting. On that second one, I wonder what kind of ICs were all over the board, like if they were 74LS which don't seem to need the bypass capacitors as badly as CMOS ones do. In this short(ish) video interview with Jeri Ellsworth, she tells about developing an FPGA product and then getting an urgent call saying that it didn't work, and they needed her to fly to China immediately to troubleshoot it. The dev board she used had power and ground planes; but they had laid out the board again to be cheaper for production, and left all the bypass capacitors out, which turned out to be why it didn't work. They thought they could do that because on the dev board with power and ground planes did work without the bypass capacitors. My understanding is that two parallel planes separated by such a small distance basically have no inductance (as long as you don't get too close to the edge).

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PostPosted: Wed Jun 01, 2022 7:30 pm 
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BigEd wrote:
As these got a mention in another thread, I thought it might be worth surfacing them:

EEVblog #859 - Bypass Capacitor Tutorial (33mins)

EEVblog #1081 - Are Bypass Capacitors REALLY needed? (35 mins)

EEVblog #1085 - Bypass Capacitors Visualised! (34 mins)

Thanks to drogon and tmr4 for linking them!


There's another of interest here:

https://www.youtube.com/watch?v=crs_QLuUTyQ - EEVblog #1176 - 2 Layer vs 4 Layer PCB EMC TESTED!

This is the one where he tests a 4-layer board vs. a 2-layer board - in this case he re-designed the Gigatron from it's original 2-layer to a 4-layer board.

-Gordon

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See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/


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