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PostPosted: Thu Jun 16, 2022 5:33 pm 
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Here's another 65816 gotcha. The mx flags are set to the opposite of what I'd expect when using XCE to switch into native mode.

My best guess is that the designers wanted to save a little silicon, so they have the XCE instruction blindly swap E and C without much awareness of what the values actually are, and not try to be convenient by clearing mx. (Surely it's not that it's actually more common to be processing 8-bit data than 16-bit data on a 16-bit processor.)

And since m and x have to be set in emulation mode, they just happen to stay that way when switching to native mode.


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PostPosted: Thu Jun 16, 2022 6:49 pm 
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It's like the interrupt sequences automatically clearing the decimal mode bit d and setting the interrupt-disable bit i. The only actual mode bits though are d and e. m and x are register-size bits that come into play in native mode. I suspect one part of the logic for starting native mode with the registers at 8-bit is that in many cases, you'll go into native mode immediately after boot-up (and never touch that bit again), and immediately you'll need to be setting up I/O, and you'll normally need 8-bit for that.

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PostPosted: Thu Jun 16, 2022 8:01 pm 
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jeffythedragonslayer wrote:
And since m and x have to be set in emulation mode, they just happen to stay that way when switching to native mode.

IMO, having x and m initially set =1 when switching to Native Mode makes things a little more friendly for 6502 folks who want to experiment with the '816.

When they first enter Native Mode, they'll find it's actually very much like Emulation Mode (ie, much like 6502). Then later, after they've gotten used to Native Mode with m and x =1 they can experiment with m=0 and/or x=0.

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