Hi,

I'm working still on a memory expansion and it works fine with LS TTL parts. In the interest of reducing current on these old beast motherboards, I was looking at switching to HC instead of LS for my gates and latch circuit. Then I see this:

http://www.interfacebus.com/voltage_threshold.html

I see a lot of discussions here about HCT as well, so I'm not sure if I should use HCT instead of HC? I want to use SMD so I won't have sockets to experiment with a bunch of different parts, but I guess I could use some SMD adapters on my DIP breadboard.

The guts look like this:

Existing motherboard parts (LS TTL) --> My expansion glue logic (family TBD) --> Expansion memory (Flash and SRAM).

It's just a slow 8-bitter, 7.3728MHz xtal.

TIA

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Yes, you want one of the "T" variant families, such as HCT. AHCT is faster than HCT but you maybe don't need that extra speed. ACT family is another option but I wouldn't recommend it for what you're doing.

I think you'll find most HCT devices available in both surface-mount and through-hole packages.

-- Jeff

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Thanks guys!

I am skeptical.

Nearly 40 years ago, in my naiveté (ignorance), at one point in internally expanding VIC20 memory I bithely mixed TTL and HC with zero concern for differring thresholds. It worked flawlessly, even with the forward voltage drops of diode ANDing.

Was I just lucky?

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"I am endeavoring, ma'am, to create a mnemonic memory circuit... using stone knives and bearskins." -- Spock to Edith Keeler

Based on the schematic excerpt you posted, it's hard to say anything definite. I don't see a clear case of TTL driving CMOS.

The main concern when mixing LS TTL and CMOS is the case where an LS output drives a CMOS input. The input of an HC device needs more than 50% of Vcc in order to perceive a logic high, and that's more than an LS output is specified to provide. But yes, you can get lucky if the spec is exceeded.

Those who don't wish to rely on luck use an HCT device to accept the output of an LS device. The HCT input has a lower threshold for a logic high, and can reliably receive the TTL signal.

HC is actually better than HCT for the diode logic in your schematic. That's because in your schematic the diode drop tends to raise the voltage of a logic low. Achieving a good logic low is a different problem than what I described above (about achieving a good logic high).

-- Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Keep in mind the spec for TTL LS logic outputs is given for a specific load. In the actual loading is much lower than what the spec is based on, the voltage swing of those TTL LS outputs may easily exceed the input requirements for CMOS HC logic. In which case the reliable operation is due more to the facts of your situation rather than chance.

The scientist in me always seems to get the better of the engineer in me.

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Bill

This seems the most plausible explanation for my circuit's success: most of the TTL outputs driving it also connect to only one or two LS inputs on VIC's board. Thanks.

_________________
"I am endeavoring, ma'am, to create a mnemonic memory circuit... using stone knives and bearskins." -- Spock to Edith Keeler