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PostPosted: Thu Jun 17, 2021 12:49 pm 
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For interest in following along, Steve Chamberlin is tracking down a glitch in his Yellowstone project ("FPGA-Based Disk Controller for Apple II"). See also various suggestions made in the comments.




Edit: added episode 5, added episode 6... and episode 7... and 8 and 9... and 10


Last edited by BigEd on Mon Jun 28, 2021 6:51 am, edited 6 times in total.

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PostPosted: Thu Jun 17, 2021 4:59 pm 
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Remind me of the problems I had experienced when directly interface to 16-bit wide CF disk. The modern fast device driving 16 data lines from low to high into un-terminated capacitive loads can cause ground to sink >1V below reference ground creating a "glitch" on the control signal. Ultimately my solution is running CF in 8-bit mode, terminate the data lines, and add a RC low pass on the control line.
Bill


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PostPosted: Fri Jun 18, 2021 5:02 am 
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BigEd wrote:
For interest in following along, Steve Chamberlin is tracking down a glitch in his Yellowstone project ("FPGA-Based Disk Controller for Apple II").


Thanks for that.

I have decided to add the Apple II series as a target for my FLEX operating system project.

Though there is very little information about how to program for it, a very rare and expensive controller connected to a SuperDrive appears to allow reading and writing conventional single and double density (FM and MFM) disks. I am hoping that Yellowstone may be an easier way there.


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PostPosted: Sat Jun 19, 2021 3:58 am 
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BillG wrote:
BigEd wrote:
For interest in following along, Steve Chamberlin is tracking down a glitch in his Yellowstone project ("FPGA-Based Disk Controller for Apple II").


Thanks for that.

I have decided to add the Apple II series as a target for my FLEX operating system project.

Though there is very little information about how to program for it, a very rare and expensive controller connected to a SuperDrive appears to allow reading and writing conventional single and double density (FM and MFM) disks. I am hoping that Yellowstone may be an easier way there.


In response to the above.... how is your 6502 port of FLEX coming along? Is it at a level where I might be able to adapt it to my own system which uses a Compact Flash Card in true IDE mode?

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https://github.com/floobydust


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PostPosted: Sat Jun 19, 2021 4:50 am 
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It is currently at the "plan to throw away the prototype and write the real thing" stage though most of the code will be kept. The memory layout and the API will go through some changes from the prototype.

I am still prototyping some of the things I am wanting to add to it and nail down what hooks I will need.

* The plan is to eventually provide a simulator for the 6800 so that many existing FLEX programs can be used. There were too many issues which cannot be resolved quickly, so I pivoted to an 8080 simulator to run CP/M programs for the prototype.

* I will be raising the limit on the number of disk drives from four to ten since FLEX uses a digit instead of a letter to specify a drive.

* Possibly supporting the notion of a "current drive" like CP/M and MS-DOS instead of having to run a utility program to assign the "working drive." The concept of the "system" drive will be kept as a simple default search path. I will also add a third "scratch" drive designation for use by things like compilers and editors.

* Instead of just one main RAM area, support a secondary memory pool so that a system with I/O stuck in the middle does not waste half of its address space.

* Core support for a hierarchical directory structure will be built in.

* I am also implementing a loadable driver to create virtual disks in RAM. There is no reason it cannot be extended to provide a read-only disk residing in ROM.


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PostPosted: Sat Jun 19, 2021 9:22 am 
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(Head post updated with part 5 of the adventure)

Edit: and I notice one of the posts in the series points to the open source repository.

Edit: head post now updated with part 6.


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PostPosted: Tue Jun 22, 2021 9:11 am 
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(head post updated with parts 6 and 7)

There seems to be contention going on, perhaps with interesting interactions between 5V and 3V parts... there also seem to be decoupling problems. I wonder if the oscillations within the traces are because ground bounce is causing the re-interpretation of input signals.


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PostPosted: Thu Jun 24, 2021 3:20 pm 
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Another update: Part 9: Scope Probe Ground Leads:
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I hadn’t appreciated how important it is to have a good short ground lead connection for the scope probe when measuring signals with fast edges, even though nice people kept trying to explain it to me.


Edit: added part 10 to the head post, the final episode.


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