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 Post subject: gEDA-pcb footprints
PostPosted: Wed May 12, 2021 7:47 pm 
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I am creating this topic to keep track of gEDA-pcb footprints. Perhaps they are useful to others; if nothing else I will know where to look next time I lose them. I will be editing this front post as needed. See below for more information, rationale, and pinning.
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W65C02.DIP.fp.zip [712 Bytes]
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W65C22.DIP.fp.zip [704 Bytes]
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AT28C256.DIP28.fp.zip [452 Bytes]
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ram-skinny.fp.zip [554 Bytes]
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Last edited by enso on Wed May 12, 2021 8:02 pm, edited 3 times in total.

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 Post subject: Re: gEDA-pcb footprints
PostPosted: Wed May 12, 2021 7:48 pm 
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Rationale
gEDA-pcb (from now on 'pcb') is an ancient PCB design and layout tool for Linux. In my opinion all PCB tools suck, and pcb is no exception: it is overly complicated; it lacks a consistent interface; documentation (beyond the basics) is scattered over obscure internet pages; making footprints is oddly difficult - to name a few issues. On the plus side: it is opensourced; you can make reusable footprint-like submodules; it is reasonably easy to learn, and it reads partial netlists as text files. The last feature requires some clarification, as I don't know of other software that is as flexible as pcb.

Schematic capture software is much worse than PCB layout tools - I have yet to find something that does not make me throw up. Over the last decade I'd given up on schematic tools, and largely follow Garth's example of drawing schematics by hand (or sometimes use a simple bitmap editor). When it's time to make a PCB, I create a netlist file. pcb netlists are simple text files, one net per line, containing a net name and a list of object/pin designations. I create these in a text editor, and load them into pcb as needed. pcb creates a rat-nest from these, and I manually route these.

What is exceptionally nice, is that each netlist file does not have to contain all the connections (which is too messy!) I generally start with a power netlist, then move on to the data bus, address bus, and control signals, all as separate netlists. pcb allows me to load them separately as needed. These netlists are very useful for verification later, and make excellent documentation in the long run - as they are very readable text files. This alone makes me willing to put up with all the faults of pcb.

Pinning

Each pin is named according to its function (use 'd' key to see them). This makes errors glaringly obvious at routing time, and helpful later during verification. The netlists use pin numbers as each net name already communicates its function, providing an extra margin of safety.

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In theory, there is no difference between theory and practice. In practice, there is. ...Jan van de Snepscheut


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 Post subject: Re: gEDA-pcb footprints
PostPosted: Wed May 19, 2021 11:04 am 
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Hi enso,

I also like gEDA pcb. I quite enjoyed the pcb manual and read it from start to finish but I also made some notes on round-trip engineering with `gschem` (the suggested schematic capture tool) and `pcb`.

I haven't created many footprints since I just use the `DIP40` or similar footprints that come with `pcb`, though having symbols for gschem can be handy.

I've put up a few footprints, though they are mostly related to a project to re-render the Commodore 16 PCB.

I quite like the "Export to gcode" feature of `pcb` that I use to CNC mill simple boards but the best feature has to be the file format, which I often edit by hand or run scripts against to make changes such as harmonizing drill sizes or similar, which the graphical UI will then offer to reload when it regains focus. It may be ancient, but this EDA software does what I want it to.


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 Post subject: Re: gEDA-pcb footprints
PostPosted: Wed May 19, 2021 11:59 pm 
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Unclouded, thanks. It looks like you are way ahead of me with round-tripping... I thinlk we are the only users of gEDA here...

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