The datasheets for the 65816 report that the clock input is to have 5ns rise and fall times, maximum. This undoubtedly becomes more and more important as clock speed increases.

Even the older datasheets for the chip say that at 1 to 2MHz, the max tF/tR is 10ns. Even so, 74AC series logic is the only logic that can come close to meeting those requirements, and even then, it's not guaranteed.

Problem: I cannot find a single logic family that will produce such fast rise or fall times! So how the heck does anyone actually build anything with the 65816?

Thanks.

That may only be a requirement for being guaranteed to meet the other timing spec.s. I can't imagine you really have to have it that fast just to make it work at all. I suppose the writing of timing specifications and the decisions as to what to test to is not an exact science, and one engineer involved in the design of the chip itself might write them a little differently from how another would, since loosening up on one will require tightening up on another.

The tF and tR only apply to the phase-2 input though; and after reading an article from Dr. Howard Johnson on clock distribution and the problems that inexperienced digital designers tend to get themselves into by taking this important area too lightly, I think I would want to have a few fast gates, inverters, whatever, with inputs paralleled so that each output can feed its signal to a light load instead of trying to drive the whole thing with one output. Actually, this seems to be the limiting factor on my workbench computer's speed, even though it'll all work to 7MHz in spite of the 4MHz parts. One edge of the clock signal is pretty lousy because I have the same phase-2 output driving 3 VIAs, 3 ACIAs, and a gate, all in DIPs, plus several inches of wire-wrap wire, and no ground plane. It may look rather neat as home-made wire-wrapped stuff goes; but all things considered, it violates a lot of those non-concrete laws we call "good engineering practice," and yet has given years of great service. I'll definitely have to do better though when I want my next one to work at 16 or 20MHz and beyond.

To get back to the subject, I would be pretty confident that you could get the thing running at lower speeds (to at least a few MHz) even with 74HC/HCT. If you can do 74AC/ACT, so much the better.

Certainly not, as at 80kHz at least, it does execute instructions with a pretty slow (~16ns or so) rise and fall time. My question is, will it still work if I bring it up to 4MHz?



I was thinking of using 74Fxx logic at first for clock stuff. It seems to be the logic family that comes the closest to satisfying the 65816's clock requirements.



Beyond? I was unaware that 65816s could go beyond 20MHz. Or are you considering a different microprocessor for that?



That's the current plan for the address decoding 7400. The outputs of the 74HC595s used in the IPL circuitry have nice, clean outputs, about 10ns rise times, and in my circuit, 13ns fall times.

Alright, now look what you did-- you made me get out my FAST logic data book (which I should have done years ago).

I wasn't able to find solid data on output rise and fall times (even in my 74ACxx book), but from some graphs, it appears that the 74Fxx have them at about 2ns, maybe slightly more. 74ASxx is the fastest one covered in this book, and the datasheet on the 74AS00 gives a maximum propagation delay of 4.5ns with a load of 50pF and 500 ohms. The typical is supposedly 1.5ns, which is almost scary. If that's the Pd, what must the rist time be? It makes me wonder if I could even build a circuit with little enough ringing that I wouldn't get into trouble there.

I did run across an ap. note about input rise times on the 74AC family which said the problem with slow rise times is that 74AC has a very high gain, and that when the output switches, the parasitic inductances of the power and ground connections can easily shift the input thresholds enough to flip the perceived state (if the input voltage is slowly transitioning through the "foggy area"), back and forth, causing this oscillation until the input has risen or fallen into solid territory of the next logic state.


> it does execute instructions with a pretty slow (~16ns or so) rise and
> fall time. My question is, will it still work if I bring it up to 4MHz?

If it does work at 80kHz with that slow a rise and fall time, I expect it would work at 4MHz. The slower rise time does not seem to be causing the oscillation mentioned above in the '816, and it's not going to take a big enough bite out of the timing margins at 4MHz to hurt.


> Beyond? I was unaware that 65816s could go beyond 20MHz. Or are
> you considering a different microprocessor for that?

I just want to have a circuit that is capable of using whatever speeds become available in the future.