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 Post subject: Fenestra6502
PostPosted: Sat Oct 10, 2020 10:41 am 
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Hi,

I made a 6502-based computer for high-level programming languages.
I also wrote a tiny compiler for the computer.

https://github.com/hatsugai/Fenestra6502

hatsugai


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 Post subject: Re: Fenestra6502
PostPosted: Sat Oct 10, 2020 10:48 am 
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Welcome! I came across a mention of your project yesterday and was intending to post about it.

It's a highly interesting idea:
Quote:
The circuit realizes "zero-page windows", which is similar to "register windows" adopted in several RISC processors. The circuit detects the instruction fetch of JSR/RTS and changes the mapping of zero-page on physical memory.


Very nice diagrams and explanation too - thanks for that and well done! (And thanks for choosing an open source license)

Several people here have a great interest in circuits which expand the capability of the 6502, and several have an interest in high level languages.


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 Post subject: Re: Fenestra6502
PostPosted: Sat Oct 10, 2020 11:38 am 
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Welcome, hatsugai, and thanks for posting! (And thanks, Ed, for excerpting some highly pertinent detail, indispensable for an introductory post on the subject.)

hatsugai, I compliment you on the conception, execution and writeup of this project! It's a good idea that you've tidily implemented then carefully explained. Bravo!

(Off the top of my head, other circuits which expand the capability of the 6502 include Marc Brooks's radar controller, Acorn's in-house extended-address machine, and my KK Computer. Documentation is always a challenge, though, and I think I could learn a thing or two from hatsugai! :oops: )

cheers,
Jeff

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 Post subject: Re: Fenestra6502
PostPosted: Sat Oct 10, 2020 12:37 pm 
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Thank you for your kind comments.

hatsugai


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 Post subject: Re: Fenestra6502
PostPosted: Sat Oct 10, 2020 2:21 pm 
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It's an interesting idea. You're basically creating a hardware data stack, which given the 6502's page zero addressing modes also acts like a register file.


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 Post subject: Re: Fenestra6502
PostPosted: Sat Oct 10, 2020 5:30 pm 
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Attachment:
prologue.JPG
prologue.JPG [ 26.26 KiB | Viewed 2415 times ]


Attachment:
benchmark.JPG
benchmark.JPG [ 30.4 KiB | Viewed 2415 times ]


It's easy to rationalize the results for all except the stock 65C02. This doesn't reflect well on the comparative abilities of cc65 to emit performant code (or is SDCC just unusually good?).

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 Post subject: Re: Fenestra6502
PostPosted: Sat Oct 10, 2020 5:49 pm 
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It might be saying that it's easier to make a performant C compiler for a Z80, but I think that's a different topic for this thread - a good idea for a new one perhaps?


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 Post subject: Re: Fenestra6502
PostPosted: Wed Oct 14, 2020 7:17 am 
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I fixed a number of mistakes on the schematic.

hatsugai


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 Post subject: Re: Fenestra6502
PostPosted: Wed Oct 14, 2020 1:16 pm 
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The benchmark result of MC6809 is corrected. (I miscopied.)

tarai: 54.421 sec -> 51.421 sec

hatsugai


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 Post subject: Re: Fenestra6502
PostPosted: Wed Oct 14, 2020 5:03 pm 
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Thanks for the update! You might see the discussion over here
viewtopic.php?p=78840
using fib and tarai benchmarks on various platforms.

I had to look up the tarai benchmark:
https://en.wikipedia.org/wiki/Tak_(function)
Quote:
...tarai is short for tarai mawashi, "to pass around" in Japanese.
John McCarthy named this function tak() after Takeuchi

But note that tak() is subtly different from tarai(). See also this pdf.


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 Post subject: Re: Fenestra6502
PostPosted: Fri Oct 16, 2020 12:51 am 
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Thank you for the information.

I was surprised to see the deep discussions.

I seem the tarai function is suitable for this kind of benchmarks, especially for measuring the performance of procedure/function calls.

Dr. Ikuo Takeuchi, the inventor of the tarai function, is famous as a Lisp hacker (one of the developper of TAO and NUE). It is said that tak version is McCarthy's mistake.

By the way, I made a MC6800 SBC (MC68B00, 2MHz) to compare the performance with Fenestra 6502 and others. Does anybody know if there is a C compiler for MC6800? If not, I will write a code generator of CCLV for MC6800.

hatsugai


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 Post subject: Re: Fenestra6502
PostPosted: Fri Oct 16, 2020 7:04 am 
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BigEd wrote:
Thanks for the update! You might see the discussion over here
viewtopic.php?p=78840
using fib and tarai benchmarks on various platforms.

I had to look up the tarai benchmark:
https://en.wikipedia.org/wiki/Tak_(function)
Quote:
...tarai is short for tarai mawashi, "to pass around" in Japanese.
John McCarthy named this function tak() after Takeuchi

But note that tak() is subtly different from tarai(). See also this pdf.


Decided to post a bigger benchmark post and moved this one over to it - everything you wanted to know about benchmarking (well... maybe not everything!) is here:
viewtopic.php?f=1&t=6323

-gordon

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See my Ruby 6502 and 65816 SBC projects here: https://projects.drogon.net/ruby/


Last edited by drogon on Fri Oct 16, 2020 11:53 am, edited 1 time in total.

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 Post subject: Re: Fenestra6502
PostPosted: Fri Oct 16, 2020 8:55 am 
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hatsugai wrote:
Does anybody know if there is a C compiler for MC6800? If not, I will write a code generator of CCLV for MC6800.
hatsugai

I think there might not be one. (HP had one which ran on their Unix workstations and on VAX/VMS, but getting that working would be difficult.)

A new code generator could be of interest to many...


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 Post subject: Re: Fenestra6502
PostPosted: Tue Oct 20, 2020 5:06 am 
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I wrote a code generator of CCLV for MC6800 and measured the execution time of fib and tarai.

Image


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 Post subject: Re: Fenestra6502
PostPosted: Tue Oct 20, 2020 8:17 am 
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Interesting! (Your CCLV repository is here.)


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