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 Post subject: W65C165
PostPosted: Tue May 26, 2020 10:07 am 
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A received one of WDCs new FPGA microcontroller boards this morning. I'll try kicking the tyres later to see how it performs.


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Last edited by BitWise on Tue May 26, 2020 10:48 am, edited 1 time in total.
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 Post subject: Re: W65C165
PostPosted: Tue May 26, 2020 10:25 am 
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Do I take it that this is an FPGA with a pre-loaded WDC microcontroller design on it? So for the customer, it acts as a microcontroller chip, without any reprogrammability? (Not that that's a terrible thing, but it seems to make the FPGA aspect somewhat incidental.)
Ref: http://www.westerndesigncenter.com/wdc/ ... 1M16SA.pdf

I note that the underlying FPGA is built on a flash technology, so it's instant-on, and has some amount of user-programmable flash for user software.
Ref: https://www.intel.co.uk/content/www/uk/ ... ax-10.html


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 Post subject: Re: W65C165
PostPosted: Tue May 26, 2020 11:02 am 
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My understanding is that this board works like a microcontroller with a set of embedded devices but its also a demonstration of the WDC softcore modules.

In addition to the CPU core there is a GPIO port, 3x VIA, 3x ACIA, I2C & SPI controllers, Hardware Multiplier, ADC, Chip ID and user flash.

I'm not sure how you actually get code into it at the moment. A puzzle for later.

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 Post subject: Re: W65C165
PostPosted: Tue May 26, 2020 11:15 am 
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Ah yes, of course, it demonstrates their cores for FPGA.


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 Post subject: Re: W65C165
PostPosted: Tue May 26, 2020 5:37 pm 
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BitWise wrote:
My understanding is that this board works like a microcontroller with a set of embedded devices but its also a demonstration of the WDC softcore modules.

In addition to the CPU core there is a GPIO port, 3x VIA, 3x ACIA, I2C & SPI controllers, Hardware Multiplier, ADC, Chip ID and user flash.

I'm not sure how you actually get code into it at the moment. A puzzle for later.


Oh the WDC documentation isn't crystal clear :roll: :roll:

Looking forward to your report. Was curious about these myself.


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 Post subject: Re: W65C165
PostPosted: Fri May 29, 2020 5:53 am 
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From the picture: 10M08, the smallest FPGA in the Altera MAX10 family.

Now this reminds me to the XLR8: Arduino based on Altera 10M08 FPGA...


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 Post subject: Re: W65C165
PostPosted: Fri May 29, 2020 1:21 pm 
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ttlworks wrote:
From the picture: 10M08, the smallest FPGA in the Altera MAX10 family.

Now this reminds me to the XLR8: Arduino based on Altera 10M08 FPGA...


Wow, WDC pricing strikes again. If this really is just a 10M08 you can get a 10M08 dev board with more I/O pins and 8MB of RAM for less than half the price:

https://www.arrow.com/en/products/bemic ... A8QAvD_BwE

WDC is effectively charging a $30-40 dollar premium for their soft core (65816 + 3x VIA + 2x ACIA), which is quite a lot.


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 Post subject: Re: W65C165
PostPosted: Wed Jun 10, 2020 11:11 pm 
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I've been fighting with the I2C and SPI controllers for a couple of days and am starting to win. WDC sent me a prototyping board that can be used with an I2C OLED display and Mikroe Click boards.
Attachment:
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The prototyping board was designed for an earlier revision of the W65C165MMC so I've had to knock up an adapter this evening to remap some of the pins to get SPI chip selects working for my newer REV C board. If I'd had a suitable JTAG programmer it would have been possible to install a reconfigured core that has the old pin arrangement but I only have old Xilinx kit not Altera. WDC say they are updating the prototyping board so it will match.

The hardware I2C and SPI controllers make generating signals easy at high speed. It took a while for me to get my head around them. On PICs there are bits in the control registers to generate start/stop/read/write signals individually. The core WDC is using combines the generation of start with the write so you do an initial 'start and write' for the I2C address, 'write' for intermediate bytes and a 'write and stop' for the last byte.

The controller designs are a little inconsistent. The I2C controller must be disabled before you can change the clock divider but the SPI controller must be enabled or it ignores the change.

My test harness splits the hardware stack and creates two cooperative threads of execution. One loops generating a I2C test packets whlle the other generates test SPI data. The I2C yields while it is waiting for its much slower operations to complete. At 14.7MHz the operations run in parallel.
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Now I have the communications working I can start on creating valid commands to some of the slaves. I'm creating a set reusable assembly code modules for each part of the system and will publish on GitHub when I'm done.

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 Post subject: Re: W65C165
PostPosted: Mon Jun 15, 2020 1:06 pm 
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The I2C controller was harder to use than the SPI but in the end I got them both working reliably.

If you squint you can see text on the I2C OLED
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There are some issues with the Mikroe OLED 2 Click board I'm using. They designed it using two pins that are normally outputs (AN - analog and INT - interrupt) as inputs (R/W and EN) to the display controller and power boost chip. I connected via a bread board so I could attach a logic analyser and wired AN(R/W) low and INT (EN) hi.
Attachment:
ssd1351.jpeg
ssd1351.jpeg [ 854.42 KiB | Viewed 2525 times ]

I'm going to play with the WiFi/BLE click next and add some ACIA/VIA timer interrupts.

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 Post subject: Re: W65C165
PostPosted: Thu Jul 09, 2020 3:17 am 
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Do you know if there's any way to get the monitor out of the road without altering the HDL, similar to the 65c265, perhaps? I've ordered one, and only now realised that this critical to what I want to do with it.
I'll be able to work out if it's possible when I have the thing in hand, but has anyone already attempted this?


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 Post subject: Re: W65C165
PostPosted: Thu Jul 09, 2020 2:57 pm 
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The monitor can not be mapped out (unlike the '134 and '265) but it vectors all the interrupts through a jump table in RAM on page 2 and will auto start application at $8004 if it has the "WDC" signature in $8000-$8003.

The 30K region $8000-$F7FF is actually write protected RAM. The monitor loads it from a flash area in the FPGA then checks for the signature. You can disable the memory protection but I've not tried this yet. So far I've only run test programs in the 10K RAM area.

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 Post subject: Re: W65C165
PostPosted: Thu Jul 09, 2020 11:38 pm 
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Thank you. I intend to use one of these as the core of a standalone handheld device, and having the firmware autostart is just a bit critical if the monitor works the way I think it does.

EDIT:
Reading the datasheet, it says the interrupt module's vectors are up against the normal vectors. I'm evidently missing information. I have the datasheet for the FPGA MCU itself, and for the series in general, but I'm not seeing that. May I ask where you learned that?


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 Post subject: Re: W65C165
PostPosted: Mon Jul 13, 2020 2:39 am 
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So I've been reading the datasheet(going about implementing what I can from it), and I'm finding that it's referencing a bunch of things that aren't in it, and that do not appear to be available, particularly the SPI and I2C specifications. I'm also unable to find any information about the embedded monitor, and my copy of WDCTools(v2.1) doesn't have a lot of the stuff the "getting started" webpage references.
Does the '165 board come with a disc or similar? I have not yet contacted WDC about this.


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 Post subject: Re: W65C165
PostPosted: Mon Jul 13, 2020 10:46 am 
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DerTrueForce wrote:
So I've been reading the datasheet(going about implementing what I can from it), and I'm finding that it's referencing a bunch of things that aren't in it, and that do not appear to be available, particularly the SPI and I2C specifications. I'm also unable to find any information about the embedded monitor, and my copy of WDCTools(v2.1) doesn't have a lot of the stuff the "getting started" webpage references.
Does the '165 board come with a disc or similar? I have not yet contacted WDC about this.

The built in ROM is like the one on the W65C02SXB and W65C816SXB. It contains the code needed by the debugger to download and run programs using a binary communications protocol.

WDC have a python program that you use to download programs and start them. I think they may have a modified version of thier debugger that can be used too -- I don't have it. I've been using a version of the python script which has been compiled into a (very large) Windows .exe.

I also have my own .NET app I was writing for the other SXBs based the reverse engineering we did a while back.

The SPI and I2C modules are based on some open cores designs. The ACIA's are based on the 65C51 and have working interrupts -- not tested by me yet.

Edit: The data sheet has a few mistakes in it which I've reported and is missing some information like the vector locations. No disk.

I have an assembly example that drives some external devices (I2C and SPI OLED displays) and I'm working on some C examples and libraries for a wider range of devices.

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6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
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 Post subject: Re: W65C165
PostPosted: Fri Jul 31, 2020 5:35 am 
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So I've had my '165 for a week, and I've made a little headway, but not enough to do anything with it. I tried to contact WDC about a week ago, and I've got no communication back, so I assume it's been lost in the shuffle.
Do you know enough about the protocol to give me a clue as to how I'd be able to upload a program to it and run it? Once I can get code running, I can dump out the ROM, determine the rest of the protocol, and build my own interface program(And publish it and not put the download behind a flippin' wall...).


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