Hi All,

Garth Wilson has designed and created a 4MB SRAM module that can be used for our projects. I have tested these on my SBC-4P and they work great. They are very compact and did not seem to add a significant amount of bus loading to my system. I was able to run my SBC-4P with three expansion cards and the memory module at 12MHz without any issues.

These will be perfect for applications that require a large amount of SRAM without taking up acres of board space.

The board has SRAM chips on both sides - 8 total.

Here are a few pictures of Garth's module:

Daryl

And just yesterday i was looking for something like this, i thought about building some kind of digital signal analyser module, which would record digital signals into ram, and then use the 6502 to preview the recorded data, i already made something similar with a pic16f877 and a 8x8 led display, but it only has 256 bytes for recording...

Oooh, looks like the SIP RAM modules we used to put into BASIC Four minicomputers back in the 1980s. Only difference, they didn't have 4 MB per module. It was more like 64K per module and each one cost a bunch.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Very nice indeed!

I don't recall anymore the precise layout but it was DRAM. There was a TI DRAM controller on the motherboard. Almost everything was in discrete logic, so the motherboard had more 74LS silicon on it than you could shake a stick at. These minis mostly had full height ST-506 hard disks, with the controller on the motherboard. Eventually, Basic Four switch to SASI and then SCSI disks.

The SIP memory module was a bit of a pain because it was quite easy to bend a pin. If one wasn't very careful in straightening the bent pin it would break off, ruining a module that, if memory correctly serves me, cost about 200 bucks. Later machines switched to SIMM packages, which, of course, were much more forgiving.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

So where can I get one, and where does one get 512Kx8 SRAMs?

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I like that!

80mA is a pretty low operating current for a larger SRAM.

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

Footnote: there are advantages to simply making a programming adapter, but we should remember it's not the only alternative. It's possible instead to write a routine to pre-scramble the binary image file before you burn it into the EPROM. It's done in such a way that the scramble of the binary array beforehand and the scramble of the pin-swaps in the target system are complementary -- resulting in no scramble at all. You can even arrange to use two software pre-scrambles in sequence, which will let you deal with Address pins that are mixed up (among themselves) and Data pins that are mixed up likewise. Better have a fresh pot of coffee on hand when you write the routines, though; the code's not horribly complicated, but you do need to be meticulous!

-- Jeff

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Do you mean something like this?

http://srecord.sourceforge.net/

I haven't used this myself, but my impression on looking at the various "input filters" was that they're meant to accomodate strange EPROM addressing schemes.

No. (Some interesting stuff there, though.) Imagine you're designing a circuit board that includes an EPROM and a CPU. Normally you'd connect d0 of the CPU data bus to d0 of the EPROM, and CPU d1 to EPROM d1 and so on. But imagine that there are physical layout issues, and, to accommodate the layout you want, you connect...

CPU d0 to EPROM d4
CPU d1 to EPROM d5
CPU d2 to EPROM d6
CPU d3 to EPROM d7
CPU d4 to EPROM d0
CPU d5 to EPROM d1
CPU d6 to EPROM d2
CPU d7 to EPROM d3

In other words the board wiring causes the CPU to "see" the EPROM data as having its hi and lo nybbles swapped. (It's an unlikely example, but easy to discuss.)

To compensate, the "pre-scramble" is performed on the binary image of the EPROM data before it's blasted into the EPROM. Say the first byte is 34h; it will be replaced with 43h. Say the 2nd byte is 69h; that'll get switched to 96h. And so on -- every byte in the binary image has its nybbles swapped. Then the EPROM is burned and removed from the programming socket. When it's plugged into the socket on your board, the CPU will read the EPROM data as being normal -- ie; the hi and lo nybbles appear back where they belong.

Depending on the layout, you may choose to scramble the address lines instead of the data lines -- or scramble both (but not with each other, of course). The wiring you adopt will determine the pre-scramble you require.

Pre-scrambling yielded an immense advantage when I mod'ed a dozen bizarre, embedded, discrete-TTL processor boards years ago. My goal was to hack the code, which -- rather inconveniently -- was stored in 82S115 TTL PROMs. I opted to replace the TTL PROMs with EPROMs, but the pinouts matched very poorly! Without the scramble trick I would have had to wire-mod almost all of the 24 pins on every socket. Instead there were only a few.

-- Jeff

Capacitors embedded in the board? Cool! That would be underneath an IC, then, right? I've wondered about trying something like that. Care to share the details, and a photo maybe? Sounds like you'd have to use a chisel or router to create a cavity in the PCB material...

-- Jeff
ps- lovely job on the RAM module!