Pulling up that BE pin is still progress, though -- it needed to be done. (Understand that we're doing our best to help, and it's not 100% easy to do so remotely.)

I hate to tell you, but there's another pinout difference that could be causing trouble. On the original 6502 (and with older C02's such as Rockwell), pin 1 is Vss aka ground. But modern C02's use pin 1 to output the VPB signal, and trouble can result if the VPB pin is grounded. You may be experiencing this.

Your computer and the NOP test rig don't actually use the VPB signal, so it's tempting to suppose VPB can be ignored. However, VPB is almost always in the high state, and tying it low can cause trouble. The CPU will try to pull the pin high, causing the CPU to draw a lot more current from the power supply, and the power supply voltage may droop as a result.

Rather than analyzing VPB or trying to compare power supply voltage drop between two different test rigs, the most direct and unambiguous course of action is to test the six questionable chips in a way that doesn't connect pin 1 to ground. (The other Vss, pin 21, remains connected, so it's not as if we're powering down the chip.)

You could modify the wiring on your computer to make pin 1 a no-connect, or install a jumper, but what I've done in this situation is to carefully bend pin 1 of the DIP outward about 30 or 45 degrees so that it fails to engage the socket when the chip is inserted.

I hope you find success! IMO it's too soon to declare those six chips defective.

-- Jeff

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Ooo...I'd forgotten about that. My RC6502 Apple 1 clone has a jumper that allows me to leave pin 1 floating or short it to ground, to deal with exactly this.

I wonder, though, would it be possible just to put a weak pull-down on that pin (10K or something like that), so that it gets pulled to ground on the non-WDC CPUs but doesn't draw too much current when using a WDC part? Or do some (or all) non-WDC parts want to sink more than a trivial amount current on that pin?

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Curt J. Sampson - github.com/0cjs

Unfortunately, a pulldown can't do what a solid connection can -- specifically, carry the transient burst of current that results every time the CPU updates its address or data bus. The buses have capacitance, and that capacitance needs to be charged or discharged. The supply pins act as the return path for that current. A typical pullup/pulldown value such as 2k or 3k is too high to shoulder much of the current. The best idea is to do as you mentioned and have a jumper on the mobo so pin 1 can either attach to ground or be a no-connect.

Admittedly, one could probably get away with having no Gnd connection at all on pin 1. After all, the newer chips seem to manage without. But maybe the newer chips incorporate other changes to compensate for the loss of the extra ground -- I'm not qualified to say; I can only speculate. And rather than trusting speculation I'd rather just ground the darn pin, which is what the manufacturer intended.

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Ed's right. About all NOP testing does is tell you if the MPU has a pulse. It will not tell you anything about the true nature of the MPU.

As for the BE input, something like it is present on some variations of the NMOS 6502. For example, both the CSG 6510 and 8502 have it, necessary because the MPU and the VIC have to co-exist on the same buses. On the 6510 and 8502, the input is labeled AEC (address enable control) and is on pin 5. When AEC is driven high, the MPU will drive the address bus. When AEC is driven low, the MPU will tri-state the address bus. This is somewhat similar in behavior to the BE (bus enable input, pin 36) on the WDC 65C02. The principle difference is the latter also tri-states the data bus and RWB when BE is low.

The point is you cannot make assumptions about what you are testing. Both pins 5 and 36 should be pulled up to Vcc with a 3.3K resistor in your test setup. In the event either of these pins is being actively driven low by the MPU the resistor will safely limit current. As a general rule, all inputs other than the data bus should be pulled up to Vcc in this fashion.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

The 6502 had Vss on both pins 1 and 21 mainly because the 6800 also did. While the 6501 was fully pin compatible with the 6800, the 6502 deleted or modified some pin functions which Motorola considered proprietary to their bus architecture, but remains mostly pin compatible.

As for why two Vss pins but only one Vdd, I note that the two are on precisely opposite corners of the package and die, and that NMOS can pull down much harder than it can pull up - so "ground bounce" is much more critical to the noise margin than power-plane disturbance, and distributing the connections to the ground plane would shorten some return paths. This is particularly important with the generally inferior noise margins of TTL logic, and the less robust methods of physically building a logic circuit. It has little to do with clock speed.

But we no longer use TTL logic, and good-quality circuit board designs are now achievable by almost anyone. So I think it's perfectly fine to use only one ground pin, at least on a CMOS 6502.

For laughs and giggles I just ordered a lot of 5 of these.

https://www.ebay.ca/itm/5pcs-W65C02S8P- ... 2749.l2649

I wonder what I'll actually end up with.

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Bill

I have my suspicions...

BTW, when I went to view the listing I was instead greeted with this message:

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Yes, but they marked mine shipped. Maybe they realized they sold over 120 lots of these at too low a price. Hmm, I wonder what's up?

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Bill

Could be, or perhaps someone got a shipment of them, decided they were counterfeits and reported them to eBay. You never know for sure.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Well, that's what the whole exercise is about. One way or the anther, it won't decide the issue, but it will be another data point, and be a pleasant distraction. It may take until covid-19 is history before they arrive, but I'll post testing results.

One question though ... how could 120 or so buyers not notice that 600+ of these were not in spec?

Actually, I'm not expecting much except the adventure ...

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Bill

I ordered 5 R65C02-P4 chips from eBay seller smart_gogo as an experiment and they arrived today.

I've tried them all on my three chip board which works out the chip type from looking at how a JMP ($FFFF) instruction executes. I have also run a variant of Chromatix's code that produces a slightly more verbose description.

The good news is that all five chips are fully functional at ~1MHz but two are actually 6502s. I can't test them at a higher clock speed.

All the chips have the same marking and the bottoms are clear of any printing/engraving.




I power my boards from a USB serial adapter connected via a USB voltage and current monitor. The 6502 chips draw 0.12-0.15A compared to 0.05A when a 65C02 is installed.

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Andrew Jacobs
6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs

Looks like one of them is missing the bottom line of the silkscreening - the one with the datecode! I assume the brush wasn't quite pulled far enough on that pass.

Two NMOS, okay, but are the other three real Rockwells or plain CMOS?

Possibly not the best photos. All the chips have all the lines.

I'd say two are NMOS 6502 and the other 3 are CMOS R65C02's. They are compatible with the 6502 pinout.

I wanted to test my board with R65C02s. Previously I only had W65C02s. The PIC firmware detects them as 65C02.

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Andrew Jacobs
6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Its probably not that accurate a setup. A short cable from my laptop to the power monitor then a 1M USB cable to the FTI232RL module and 6" jumper wires to the board.

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Andrew Jacobs
6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs