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PostPosted: Thu Apr 04, 2019 2:58 am 
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Hi,

My first post here.

I am new here.

Building a discrete logic 6502 CPU, a design by Drass.
So far, only the soldering iron is smoking... so not sure if it's going to work first go around.
Fortunately, I am very lucky to have Roberto near by to get this running, I am certain to need his help before the cpu cycles!

Cheers,
Josh Bensadon
Toronto


Last edited by jbensadon on Fri Apr 05, 2019 12:19 am, edited 2 times in total.

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PostPosted: Thu Apr 04, 2019 8:15 am 
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Welcome, Josh! I look forward to hearing about your progress (even if it's a bumpy road.)


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PostPosted: Thu Apr 04, 2019 4:31 pm 
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Hi Josh,
and welcome to the forum.

Don't worry, I think that sooner or later your CPU will be up and running.

It's daring that you try to rebuild the "pre_alpha prototype",
but I can't tell when we are through with backannotating these patches
into the schematics, the PCB layouts and the documentation.

Looking forward to watching your progress in the forum.
Good luck and god speed.


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PostPosted: Thu Apr 04, 2019 4:31 pm 
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jbensadon wrote:
So far, only the soldering iron is smoking...
Ha! A favorable state of affairs. :P Welcome, Josh. Nice to see your name turn up here.

-- Jeff

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html


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PostPosted: Fri Apr 05, 2019 3:08 am 
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Hi Josh! Looks like you've had a warm welcome from Team C74 already: ttlworks and Dr Jefyll were instrumental on the project. It's been a real pleasure to learn from them.

Super exciting that you're doing this build, especially using the prototype boards. Gonna be a lot of fun!

Once we validate things, I'll publish the Patch Guide as well as the annotated schematics. Who knows, maybe others will be inspired to build one of these. (I do have several spare PCB sets if anyone is interested. Happy to pass them along).

Cheers,
Drass

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PostPosted: Tue Jun 25, 2019 2:34 am 
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Josh wrote to say he has resumed work on his C74-6502 after a brief hiatus. He sent along an action shot of his workbench ... :D (posted with his permission)
Attachment:
99A351F3-07C6-43EB-A6F1-779C155BE351.jpeg
99A351F3-07C6-43EB-A6F1-779C155BE351.jpeg [ 583.96 KiB | Viewed 1533 times ]
Seen on the wall are jumbo set of C74-6502 schematics, and also a pair of populated PCBs on the bench. Fantastic!

Josh, when you get a chance, you might want to post about your cool Arduino test environment for the CPU (pictured below):
Attachment:
1D5D7A75-FE19-4302-B0DF-7F881B558BAD.jpeg
1D5D7A75-FE19-4302-B0DF-7F881B558BAD.jpeg [ 692.08 KiB | Viewed 1533 times ]

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PostPosted: Tue Jun 25, 2019 4:08 am 
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Like all things, you can't fix something without the right tools!
I needed something that will exercise a 6502 CPU, so I figured I would put an Arduino Mega on the job.
On my bench, you will see a 6502 plugged in to the top of the Arduino.
I am clocking the chip by using I/O commands and observing the bus for correct operation.
Building test routines for various instructions.
Once done, I'll apply it to the C74-6502, and should have it fixed in no time!

Cheers,
Josh


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PostPosted: Sat Jun 29, 2019 2:47 am 
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I've got my Arduino 6502 tester working reasonably well. It's testing about 90% of the 6502 functionality. However, the C74-6502 is showing some quirks that don't match the 6502 processor. It's hard to nail down and/or describe. I am not pulling out the logic analyzer yet, I'm trying to just get around it by poking different numbers into the black box. But, for anyone's curiousity, here's what I've done so far with the Arduino 6502 tester:

Clock Phase Test:Pass Checks for alternating phase 1 , 2 clocks over 1000 cycles.
Reset Vector Test: Pass Sets vector from 0000 to FFFF and resets, checks for correct address on the bus (part of Reset routine).
NOP Address Test: Pass Runs NOP's through whole range
JMP Address Test: Pass Runs a JMP through whole range
REG ACC Test: Pass LDA immediate and STA absolute through 00 to FF
REG X Test: Pass LDX/STX
REG Y Test: Pass LDY/STY
Zero Page Addressing: Pass etc... checking for correct address over entire range(s)
Zero Page X Addressing: Pass etc...
Zero Page Y Addressing: Pass
Absolute Addressing: Pass
Absolute X Addressing: Pass
Absolute Y Addressing: Pass
Indexed Indirect X Addressing: Pass
Indirect Indexed Y Addressing: Pass Testing partial range since there's 24 bits involved in getting address.
Stack Pointer Reg: Pass Using TXS and TSX to test full range and PHP and PLP for increment/decrement operation
Status Reg: Pass Poping and Pushing the Status Register over the 00-FF range (ignoring bits 4&5)
Branching: Pass Testing whole range -128 to +127
Flags: Pass Testing all set/clear instructions and the SO pin
Conditional Branching: Pass
ALU - ADC: Pass Adding range 00-FF with range 00-FF without carry in and testing for correct result and flags.
ALU - ADC Carry Set: Pass Same test, but with Carry IN set.
ALU - AND: Pass etc....
ALU - OR: Pass
ALU - EOR: Pass
ALU - ASL: Pass
ALU - LSR: Pass

Cheers,
Josh


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PostPosted: Wed Jul 03, 2019 2:09 am 
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Hi Guys,

Well, I'm finally finished trouble shooting these boards. Found 4 problems in total... all my fault for not being more careful in soldering and younger! or at least having very good eye sight.

Problems #1 and 2 on Board A were solder shorts, see below.
#3 was a pin lifted for an early mod was left lifted. I failed to go pin by pin to reconcile all the mods.
#4 was a pin that didn't get soldered.. looked soldered but was a good 0.004" off the board.
While all these faults could have been fixed through careful visual inspection, I just couldn't find them!!!
It's a relatively big circuit done with very small parts!


Attachment:
IMG_0986.JPG
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Attachment:
IMG_0987.JPG
IMG_0987.JPG [ 488.31 KiB | Viewed 1414 times ]


Pictures of boards separated by jumpers for trouble shooting. Boards are flipped to each other to allow the bigger connector to be used directly.

Attachment:
IMG_0989.JPG
IMG_0989.JPG [ 650.95 KiB | Viewed 1414 times ]

Attachment:
IMG_0988.JPG
IMG_0988.JPG [ 671.19 KiB | Viewed 1414 times ]


Well, this project is now come to a close.
Please come see me at VCF MW in Chicago in September if you would like to see the C74-6502 in action!

Regards,
Josh Bensadon
Toronto


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PostPosted: Wed Jul 03, 2019 4:55 am 
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It's alive! Fantastic!


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PostPosted: Wed Jul 03, 2019 2:55 pm 
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Great news Josh! Congratulations. The pics look great.

Gotta commend you on your persistence to see the thing through. It would not have been easy to deal with all those patches!

Cool to have two functioning C74-6502s in the world. :) And great to hear yours will be making an appearance at VCF!

Cheers,
Drass

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C74-6502 Website: https://c74project.com


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PostPosted: Wed Jul 03, 2019 11:02 pm 
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Drass wrote:
Cool to have two functioning C74-6502s in the world. :)
The first steps on our path to global domination! :twisted: :twisted: :twisted: :wink:


Congratulations, Josh. Nice to see your persistence rewarded with success. :)

cheers
Jeff

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html


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PostPosted: Thu Jul 04, 2019 7:19 am 
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Congratulations, Josh.

And now that we know that the patches seem to be working as intended,
it's about time to back_annotate them into the schematics and PCB layouts.

Just to make sure that there might be more than two functioning C74-6502s in the world someday. :)

Dr Jefyll wrote:
The first steps on our path to global domination! :twisted: :twisted: :twisted: :wink:

Global domination of TTL hobby computing, that is. One step at a time. ;)


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