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PostPosted: Wed Feb 12, 2020 7:01 am 
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Just wondering if there are a typical set of pins used for bit-banging serial on a 6522/65C22 VIA chip? Recommendations?

TIA... Cheerful regards, Mike, K8LH


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PostPosted: Wed Feb 12, 2020 8:25 am 
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Yes, especially synchronous serial like I²C and SPI. See the relevant part of the 6502 primer's circuit potpourri page at http://wilsonminesco.com/6502primer/pot ... ITBANG_I2C where I show circuits and also have links to working sample code. This link takes you directly to the I²C part. The SPI part is right below it.

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What's an additional VIA among friends, anyhow?


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PostPosted: Wed Feb 12, 2020 8:41 am 
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Hi, Garth. I meant serial serial (grin). Asynchronous serial. You know, like the serial signals for RS-232 or the serial signals for serial-to-usb...


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PostPosted: Wed Feb 12, 2020 9:05 am 
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Well, again, remember you can test bit 7 and bit 6 directly to branch on. Bit 6 might be extra interesting since the BIT instruction puts it in the C flag so it's ready to shift into the byte you're forming when receiving. Asynchronous serial normally goes lsb first, so you'll shift right.

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PostPosted: Wed Feb 12, 2020 10:07 am 
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There's a very fast and possibly half-duplex serial driver for the Beeb called UPURS, which uses these pins:

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The official BBC cable for UPURS (documented in the manual) has:
TXD = pin 20, PB7
CTS = pin 18, PB6
RTS = pin 8, PB1
RXD = pin 6, PB0
https://www.retro-kit.co.uk/UPURS/


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PostPosted: Wed Feb 12, 2020 4:52 pm 
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GARTHWILSON wrote:
Bit 6 might be extra interesting since the BIT instruction puts it in the C flag
A related detail... one that's quirky and obscure, but heck -- if you're reading a thread about bit-banging then I assume you've gone pretty far down the rabbit hole already.

The BIT instruction certainly has its place, but in certain cases you'll want to avoid BIT and the special status it brings to bit6. I'm referring to cases where
  • utmost speed is required, and
  • the code is doing input as well as output.

The latter point rules out half-duplex async. What's eligible is async full-duplex as well as SPI in full-duplex or SPI input-only (which still requires that Clk be output). Here's the key point:

If bit0 of a port is assigned as an output and bit7 is assigned as an input, then INC Port -- a single instruction -- can do input and output simultaneously. It can output a 1 to bit0 and also input bit7 and copy it to the N flag. (We assume bit0 is clear beforehand. And DEC Port with bit0 set beforehand can output a 0 while also inputting bit7.)

To see this used "in real life" check out my SPI-related post here. The choice of bit7 and bit0 is crucial to the very high speed of the routines. ( <=19 cycles/bit for SPI input, <=18 cycles/bit for SPI output )

PS and FWIW: Garth & I seem to have independently discovered this point about INC/DEC outputting while also testing bit7. Somewhere on his web site -- a section on programming tips? -- I stumbled across a reference to it. But I'm not able to find it now.

-- Jeff

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Last edited by Dr Jefyll on Wed Feb 12, 2020 11:38 pm, edited 1 time in total.

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PostPosted: Wed Feb 12, 2020 5:14 pm 
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Since we've always had the ACIA and other UARTs, I have not thought much about asynchronous serial bit-banging; but for doing it with a 6522 VIA, it occurs to me that the CA1, CA2, CB1, and CB2 pins should be considered as active-edge interrupts for detecting the start bit for receive. Whichever one you choose would be connected to a port pin.

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