I was mulling over the merits of a ground plane, as usually seen in 4-layer designs, and as
recently discussed in the context of having a few cuts in the plane to carry some overflow signals...
... and it got me to thinking about my experience in chip design. When I started, single layer metal was the norm, and the usual way of distributing power was the interdigitated tree - as seen for example on the 6502. Before long, I was working with one-and-a-half layers, and then two-and-a-half, and over the years the number of metal interconnect layers just kept going up.
Once you had enough layers, one of the schemes for power distribution was the grid. In one layer, for argument's sake a layer used for horizontal routing, which is to say east-west, you'd use a proportion of tracks for alternate power and ground. In the adjacent layer, going north-south, you'd again alternate power and ground, perhaps using 10% of the available tracks. You'd connect these two in the obvious way, so you end up with two interleaved grids, one with power and the other with ground. It's relatively easy to analyse the resistance, current capacity, and voltage drop of a grid, and you get pretty good connectivity from all the edges to wherever happens to be the hot spot of logic.
Oh, here's a picture, which might have saved me a few words:
I'm not sure I've ever seen this approach used on PCBs, even though it feels like it could be applicable even to a 2-layer design.
One of the things we'd then do, in some cases, is regard the signals which happen to run adjacent to one or other mesh as being half-shielded. I can't quite remember how we used that fact - just possibly we used those positions to distribute clocks and strobes.
Comments?