... to a new SBC that is

After a 3-year delay, I now have a new Pocket SBC completed and running. While there's nothing truly earth-shattering about it, it does provide a new development platform with good flexibility with a fair amount of function that fits in your shirt pocket.

Specifications:
- W65C02S running at 6MHz
- 32KB SRAM (Alliance 62256 @ 70ns)
- 32KB EEPROM (Atmel AT28C256 @ 150ns)
- Single glue chip (Atmel ATF22V10C)
- Single Reset chip (TL-7705B)
- Panic/NMI debounce (Maxim DS-1813)
- UART (NXP/Philips SCC2691)
- FTDI D5-USB-5M UART to USB interface
- 30-pin Bus expansion connector
- 4 I/O selects on the bus that are 32-bytes wide

As I had quite a lot of the required chips, sockets, caps, etc., I opted to use all DIP packages. I wanted the tiny size and used ExpressPCB's MiniBoard Pro 4-layer option, i.e., 3 boards for $81. I managed to squeeze everything in and get down to 349 through holes (350 is the limit) by breaking a few design rules for horizontal and vertical traces

For me, it's been a fun little project and provided the following new bits:

- Using a new Reset chip that provides Positive and Negative leading Reset lines that are open collector/drain.
- Using a PLD device for a single glue chip (provides ROM/RAM and 5- I/O selects plus MWR/MRD lines).
- NXP SCC2691 UART to get off of the ailing 65C51 ACIA for a console.

I have to say that getting the 2691 UART running was a bit painful. Documentation is somewhat lacking and the actual initialization process is quite extensive compared to the 65C51. As it stands now, I have an early BIOS working with a slightly modified Monitor from my previous board set. It still needs some work, but the UART is functioning in a stable manner and am also using the Timer/Counter as a Jiffy Clock (10ms) for keeping time and providing accurate software delays via the Monitor.

A couple pics:



Second pic with a ZIF socket stepped up in the EEPROM socket for easy swapping.



I'm hoping to get most of the BIOS/Monitor completed by end of the year and then start adding some new features (to the BIOS/Monitor) and hopefully add in MS Basic as well.

_________________
Regards, KM
https://github.com/floobydust

Three years isn't bad. I started design work on POC V2 in 2010 and didn't have assembled hardware until the latter part of 2016.


It seems as though NXP did a little better job of documenting the new UARTs—the 2691 is nearly 30 years old and its documentation is kind of lame. All NXP UARTs are highly configurable, which means you have to do a fair amount of setup and initialization to get them running. It's kind of like starting up an old airplane with radial engines.


The way your chips jammed together kind of resembles the Hong Kong skyline.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Haha... thanks. It's also has some smaller nested buildings, i.e., the bypass caps. I opted to hide them under the chips as the sockets provide ample space and it allows them to be close to the power pins.



I also printed the top layer out to ensure parts would fit. Despite close neighbors, the chips can still be pulled quite easily.



I used a small piece of styrofoam, placed the 1:1 paper printout on it, used a small sharpened point to poke holes for all of the components and popped them in to ensure proper fit and spacing.

_________________
Regards, KM
https://github.com/floobydust

Paper and foam - that's a nice technique!

349 squeaky pops in Styrofoam. My teeth are literally grinding thinking about that...must have been unpleasant to say the least!

Great job on the computer.

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Cat; the other white meat.

That's a great compact layout. Love it!

===Jac

It reminds me of the "Computer Design" industry magazine that I got a few free issues of in the 1980's, where you'd see all these 6U VME industrial computer boards with wall-to-wall DIPs and no space between them, truly making the most of every square centimeter of board space. Today when I look at most boards, I think, "Why am I seeing blank board space between the parts?" Good job.

If you ever want to make it any denser, you can put parts on both sides. It pretty much requires that ICs, at least on one side, use a pair of single-row sockets so you can solder them in and still have space between the rows to get access to solder the rows of pins coming in from the other side! Another possibility is to put narrower ICs under the wider ones—although this one might not pay off quite as well. With either of these though, you'd probably need quite a few layers to get everything routed. It'd be a challenge for sure.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Thanks to all for the kudos:

In response:

- paper and styrofoam as a technique... Never really gave it much thought, just seemed logical with all of this stuff sitting around the house. It worked out better than I expected.

- poking 349 holes... no real issue as I only poked the holes through the paper, I use the component leads to push into the styrofoam. It really didn't take much time actually. I ended up doing about 3 minor layout changes, so I did this print and poke thing a few times before I was happy with it.

- compact layout... Yes, I prefer a very small PCB here. Small things are nice... you can fit (or hide) more of them in the house My custom-built PCs are in very small ITX chassis, etc. Even my fun car is quite small and compact (Elise SC)

- a more dense board... I guess it depends. Components on both sides are a challenge, unless they're SMT. The first completed layout was around 417 holes, so didn't meet EPCB requirements for their MiniBoard service. It took a fair amount of rework to get the hole count down. I am thinking my next SBC project will be based on a NXP DUART and all main packages (CPU, GLUE, EEPROM, DUART) will be in PLCC. I prefer to avoid SMT for these projects. Granted I don't trouble mounting the parts during build, but if I need to remove one, it gets ugly quick as they become surrounded by larger DIP pieces.

In case anyone has interest, Ive attached the schematic and PCB layout in a ZIP file.

_________________
Regards, KM
https://github.com/floobydust

Even in sockets, PLCC parts use less PCB real estate than DIP equivalents. Thanks to PLCC parts, I was able to cram POC V2 into almost the same sized board as POC V1, even though V2 has a lot more RAM, more RS-232 channels, etc. Only the expansion port and the ROM socket are DIP.

If your PLCC devices are socketed you can readily remove them with a chip puller.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!