yzoer wrote:
While the WDC versions have a BE input, they're CMOS so I'd have to add level shifters which I'm trying to avoid and keep the count to a minimum.
Actually, it appears that WDC's data sheets may not be entirely accurate in that regard, and that the 65C02 and 65C816 inputs are TTL level (except the clock input, which must be driven rail-to-rail). I can attest that the 65C816 will work with SRAM that has TTL level outputs, and at high speeds, as proved in my POC V1.1 unit at 15 MHz.
Furthermore, consider that the 65C02 is a drop-in replacement for the NMOS 6502. It would not work in that capacity if it required inputs to follow CMOS logic levels.
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The integrated I/O also helps
At the cost of some zero page locations. You can simulate that with a CPLD and some well-thought-out logic.
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Too bad you can't find 2- and 3mhz versions on ebay though!
The 8502 will run at 2 MHz and has the I/O ports present in the 6510.