Early NMOS implemented ROR, it was just that it didn't work correctly
So they removed it from the datasheet and updated the data sheet with the fixed CPU next year.
[update - the earliest datasheet I have says that it 'will be available' in 1976.]
[addendum: http://www.pagetable.com/?p=406]

Didn't work correctly? Now you have me curious. What did it do? I assume it trashed the accumulator, but did it do so in a consistent manner?

I did and those opcodes were the first ones I double checked (since there are often executed during the routines in question).

Axel.

It's mentioned on that page I linked to:

It should be named as LOL instead

Maybe try Klaus's nice 6502 CPU test: https://github.com/Klaus2m5/6502_65C02_functional_tests

Wow ... very impressive to have this much working - congratulations! Using Klaus' test suite from here seems like a good idea.

_________________
C74-6502 Website: https://c74project.com

Thank you. Didn't know about this and ran out of ideas.

Axel.

yes, congratulations, Ax2013! Do you have an up-to-date photo you can share?

-- Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Well, sure. However it hasn't changed much since the last photo.


Bottom right ROM/RAM, RS232 on breadboard and top right clock.

Axel.

I spent hours in searching for the error. Focused on the microcode, but there wasn't errors. After "single step" debugging I found out that the clock design is so strict that I cannot mix HCT and LS chips. Need to redesign clock circuit (if I continue this project at all). The current setup won't work very fast either. Couple of not gates are not enough between phases.
But anyway... the first milestone reached:


Axel.

Made some tweaking in clock circuit. Max clock: 1.5MHz stable. Using 1MHz oscillator should be safe.


Axel.

BTW: it has been "a while" since I wrote few lines in Basic...

Congratulations: finding and fixing that sort of error ain't easy.

I remember to have had problems with the clock generation in my first TTL CPU (M01), too.
When making a complete redesign (M02), I had aimed for two PCBs with a less dense layout instead of sticking with a single PCB.

http://retro64.altervista.org/blog/home ... 7792968750

Ran these tests for fun. I expected much lower results due to MS Basic 1.0, microcode not fully optimized and slow shift right implementation.
TTL CPU @1MHz.

Benchmark 1
1,5 sec

Benchmark 2
9 sec

Benchmark 3
18 sec

Benchmark 4
20 sec

Benchmark 5
22 sec

Benchmark 6
33 sec

Benchmark 7
49 sec

Benchmark 8
1 min 52 sec

Axel.

disclaimer: this is very unscientific

The final release of the schematic. I haven't drawn it publishing in mind but the story matters... (I hope).
Right now I'm waiting for RS232 PCB. That completes the prototype.


Axel.