I fully agree, but still as I said I want to combine it with a flag as not necessary all RTI return to the user (nested interrupts or the NMI occurs during processing of a system call). So it is more or less the same I was discussing here
http://forum.6502.org/viewtopic.php?f=1&t=4141 only there I still thought about using a 74LS610/12 but in this discussion it came to my mind that a simpler mapping is as good as having a 74LS610, so indeed as you mentioned in the other thread, this certainly can be implemented in a CPLD (e.g. ATF1508AS) as soon as you only have very few mapping registers. Which on the other hand would allow a very fast (10MHz or higher) system as the ATF1508AS would account only for about 10ns delay.
As for the protection rules. Each user only sees "his" 64kbyte RAM and nothing else. It is more separation than protection. The only way for the user to exit it's jail is to use break (jail-break becomes a completely differnt meaning here
). I'm thinking about a very simple mapping
Code:
User: $0000..3FFF Page 0
$4000..7FFF Page 1
$8000..FFFF Page 2
Kernal: $0000..3FFF physical RAM $00000..003FFF
$4000..7FFF a window that can be mapped anywhere in physical RAM using a dedicated MMU register mainly to access the user space
$8000..BFFF IO
$C000..FFFF physical RAM $00C000..00FFFF No ROM (bootstrap like in my other project Romulus 1st)
You may ask why only 3 User Pages of un-equal size. The answer is I want to use only one Macro Cell per physical memory address line in the ATF1504AS to select the physical address and I have only 5 Product Terms per Macro Cell. This saves resources and minimizes propagation delay.