2 Oscillators and an EconoReset in one DIP8

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BitWise
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2 Oscillators and an EconoReset in one DIP8

Post by BitWise »

I tried out Mike's idea of using a PIC16F18313 to create clock signals for a 65(C)02 and 65(C)51 plus a DS1813 like EconoReset pulse.

The code, schematics and resulting waveforms can be found here https://github.com/andrew-jacobs/hz-maker.

More testing is required but looks promising.
Andrew Jacobs
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8BIT
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Re: 2 Oscillators and an EconoReset in one DIP8

Post by 8BIT »

I like it. Great application!
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BigDumbDinosaur
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Re: 2 Oscillators and an EconoReset in one DIP8

Post by BigDumbDinosaur »

BitWise wrote:
I tried out Mike's idea of using a PIC16F18313 to create clock signals for a 65(C)02 and 65(C)51 plus a DS1813 like EconoReset pulse.

The code, schematics and resulting waveforms can be found here https://github.com/andrew-jacobs/hz-maker.

More testing is required but looks promising.
Are you planning to produce these?
x86?  We ain't got no x86.  We don't NEED no stinking x86!
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Michael
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Re: 2 Oscillators and an EconoReset in one DIP8

Post by Michael »

Hey, Andrew... nice job.
BigDumbDinosaur wrote:
BitWise wrote:
I tried out Mike's idea of using a PIC16F18313 to create clock signals for a 65(C)02 and 65(C)51 plus a DS1813 like EconoReset pulse.

The code, schematics and resulting waveforms can be found here https://github.com/andrew-jacobs/hz-maker.

More testing is required but looks promising.
Are you planning to produce these?
Hi BigD.

I have a programmer and could perhaps help out state-side users.

I should mention that this is an updated version of the 8-pin ClockGen circuit I posted a couple years ago. That version had a lower frequency Clock and an NCO (Numerically Controlled Oscillator) with only a 16-bit phase increment register which limited NCO output to about 307200-Hz (19200x16). The new PIC 18000 series devices support a higher speed clock and have 20-bit NCO phase accumulator and phase increment registers. Some possible settings for ACIA clock include;

Code: Select all

  --- nco output -------  ncoinc   tolerance
  500000x16 (8000000-Hz)  524288   ±0.00000%
  460800x16 (7372800-Hz)  483184   ±0.00004%
  230400x16 (3686400-Hz)  241592   ±0.00004%
  115200x16 (1843200-Hz)  120796   ±0.00004%
   57600x16 ( 921600-Hz)   60398   ±0.00004%
   38400x16 ( 614400-Hz)   40265   ±0.00079%
   19200x16 ( 307200-Hz)   20133   ±0.00169%
    9600x16 ( 153600-Hz)   10066   ±0.00327%
    4800x16 (  76800-Hz)    5033   ±0.00327%
    2400x16 (  38400-Hz)    2517   ±0.01659%
A 14-pin version can include jumpers to set the CPU clock (1/2/4/8-MHz) and the ACIA clock. Having a jumper to select ACIA clock frequency might be handy if using a 68B50 or HD63B50.

Cheerful regards, Mike
Attachments
Clk-Gen 14a.png
clkgen-14.png
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