Hi grzeg,
I am not a Commodore 64 expert, and some of your description I didn't understand. But the schematic answered most of my questions, and I decided to post an excerpt here:
Attachment:
1MB C64.gif [ 16.01 KiB | Viewed 2420 times ]
On the right I see you have a SIMM memory module, with most of the connections attaching via jumper wires from where the original DRAM chips used to be. But, with 16 times as much memory, the SIMM has two extra (multiplexed) address inputs.
Looking upstream, I expected to see four non-multiplexed address lines (which multiplex as 2 bits of Row address and 2 bits of Column address). Okay, but that 'LS153 mux has
eight inputs, not four! -- and all eight lines come from the '273 output port. Time to look more closely. When AEC from the
VIC chip is high, the upper 4 bits of the '273 output port will select which of 16 memory banks will be active. When AEC is low, the lower 4 bits of the port will select which bank will be active. Either way, the output port always remains in control.
grzeg wrote:
0.5 kB RAM in I/O ($D600 - $D7FF) for program MMU
I guess this is where you store the subroutine that alters the output port and selects a new DRAM bank. (A 32K by 8 static RAM chip is visible elsewhere in the schematic, attached so only 512 bytes are used.) If you tried to store that subroutine in the DRAM instead, you'd "pull the rug out from under your own feet" when the bank change took effect! Very interesting -- thanks for sharing this.
-- Jeff
_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html
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