Hi,

what solutions do you use to send data from a 6502 to a AVR microcontroller. I'm especially interested in solutions with a minimal circuit footprint and if possible using only standard 74xxx type devices. Only the direction 6502->AVR is needed but there must be some sort of overrun protection (busy/ready flag) so the AVR can tell the 6502 if he can accept another byte.

Cheers

Peter

I haven't actually done all this 'yet' (still getting there) but often there's a few spare pins on another device that can be used to piggyback an AVR or suchlike. My soundcard I recently made several variations of has 8 IO lines just begging to be put to good use. They are part of the AY-3-8912A. Alternately there's no harm in using a few bits in a latch that's already there.

So... my theme is waste not want not. Or what about magic addresses to set and reset a flip flop AKA fancy 2600 cartridges. Many people are already using GALs, PALs etc so it'd possibly just be a little extra HDL. Thing is, it's all memory addresses except for a few special purpose pins.

Daryl's one chip video uses an ATmega88 which is an AVR in the same family as the 328p used in the Arduino. He uses SPI via a 6522 to send a receive data from the 6502 to the ATmega88.

If you're willing to use six pins on the AVR you could use a scheme similar to the 4 bit interface used by LCD's. That would eliminate additional hardware like the 6522.

On a 6522 you could do the I2C thing and therefore get a bucket load of devices including an AVR on your system though I might point out that bit bashing I2C means you'd be soaking up cycles. There's RTC clocks, flash memories, IO expanders, display modules, tuners, digital pots, sensors, DACs, ADCs and a veritable cornucopia of other things. It's a very worthwhile bus for slowish things.

Here's a suggested arrangement which has major limitations, but uses very little hardware. Perhaps it will meet your needs, Peter.

One pin of the AVR is defined as an output bit. It drives the 6502 NMI input. Another pin of the AVR is defined as an input bit. It is driven by one of the low address lines of the 6502, such as A2.

When the AVR drives NMI low, a 6502 interrupt will occur almost immediately. The interrupt service routine for NMI contains two short (eight cycle?) software delays, and, for each interrupt, the ISR makes a choice whether to branch to one delay or the other. The code for one of the delays is mapped into addresses for which A2 is low, and the code for the other is mapped into addresses for which A2 is high. The AVR samples A2 during the time the selected delay is executing, and thus learns which delay was chosen. IOW each interrupt allows one bit to be passed from the 6502 to the AVR.

When the 6502 has no message to send, the bit will always be zero. But when there is a message, the 6502 allows a "1" to be passed, which serves as a "start bit." The following eight interrupts convey the byte which is the message itself.

The 6502 will never speak unless spoken to -- it cannot interrupt the AVR. That may be a serious drawback... or not.

-- Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Could you map a small block into 65816 memory space for AVR I/O, with an associated chip select driving a 74x74 flip-flop, which in turn drives the 65816 'RDY' line? Could the AVR monitor the 'RDY' line, pull a byte from the data bus, then reset the '74 flip-flop? If you've already got a latch in place between the AVR and 65816 for boot loading, perhaps the AVR could use one bit in that as a signal for the 65816? For two-way (read and write) AVR I/O, I imagine the AVR will also have to monitor the 65816 R/W line.

I tried to use 74165 and later was successful with 74138 decoder. But that's just for debugging purposes.

viewtopic.php?f=4&t=3378

Thanks for the many valuable suggestions.

Peter

You're welcome, Peter.

May I ask what kind of function the AVR will perform with the data coming from the CPU, please?

I have built a small VGA text display supporting 24x80 characters using a ATMega328P and a 74HCT166 (for the VGA signal) and I want to interface this directly with the 6502. At the moment it receives the data via the USART but that requires an ACIA on the 6502 side.

This sounds similar to Grant Searle's video and keyboard processor. He has three modes of interfacing I2C, 4 bit or 8 bit bus:

http://searle.hostei.com/grant/MonitorK ... index.html

I've often thought that the Zusebox could be used as a video display for an eight bit machine and make an excellent video display.

Thanks for the link, I already looked at it some time ago. At the moment I'm still looking at the various options. I have 10-12 (depending on some VGA options) pins left on the VGA terminal, so most proposals are feasible.