Hobbit1972 wrote:
"the flawed but fixable 6509" (
viewtopic.php?f=10&t=2997&hilit=6509#p33930) - are there really ways to fix that issue? Or was that a fix in a FPGA redesign?
I meant a redesign -- something that would allow us both to
have the registers at 00/01 (because they're necessary for mapping control)... and also
not have the registers at 00/01 (because they fragment the 1 MB space)! Here's how. Indirect-Y mode is mandatory when accessing extended memory
via the registers, but a person would never need to use Indirect-Y mode to access the registers themselves. That means the problem would be solved if the select logic for accessing the registers themselves would look for address 0000/0001
and require that Indirect-Y mode not be in effect. That'd be easy to arrange in an FPGA design but it's not something you could retrofit to an existing 6509.
( Maybe existing 6509s
do feature such logic. After all, it would've been easy for MOS to do it that way -- a minor change with major benefits! But the datasheet is vague, and I don't have a 6509 to test. Therefore I posed the question in
this post, which is part of the thread
MOS 6509 look-alikes. )
Quote:
Using 00/01 to switch 16kb/32kb memory banks, e.g. CPU sees C000-FFFF part of a 256kb ROM, P0-3 select which 16kb of the ROM are accessible.
Clever idea -- I like it!
Quote:
Instead of banking in a larger window of 16-32kb, focus on the 6502 architecture and use banks of two pages (to allow for abs,X/abs,Y). That would mean CPU can do pointer arithmetic at 8-bit boundaries. Each window would require a set of adders so bit 9 can be calculated in.
Another clever idea. I
think I understand, but, to be sure, let me explain it back to you.
In the small map (64K) you have a page set aside -- let's say it's page $20 ($2000-$20FF). Your custom hardware causes page $20 to map to any desired page in the big map (1 megabyte?). For example, page $20 might map to page $113 ($11300-$113FF). But what do we do if indexing causes the CPU to output an address in page $21 instead? Your plan is to also have page $21 set aside. Of course it must map to page $11
4 for indexing to work -- and the adder you mentioned would compute $113 + 1 = $114.
The adder idea is workable, but the delay is a potential problem. There are alternatives. Since you already need some sort of register to hold the extended page address ($113), you could easily have another register to hold the $114. Software would pre-increment the value at the time both registers were loaded. If you used 74_670 IC's then the extra register would not require a lot of additional wiring. (For more on the '670, see the topic
here.)
-- Jeff
_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
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